Letter pubs.acs.org/NanoLett
Synthetically Encoding 10 nm Morphology in Silicon Nanowires Joseph D. Christesen,† Christopher W. Pinion,† Erik M. Grumstrup, John M. Papanikolas, and James F. Cahoon* Department of Chemistry, University of North Carolina at Chapel Hill, Chapel Hill, North Carolina 27599-3290, United States S Supporting Information *
ABSTRACT: Si nanowires (NWs) have been widely explored as a platform for photonic and electronic technologies. Here, we report a bottom-up method to break the conventional “wire” symmetry and synthetically encode a high-resolution array of arbitrary shapes, including nanorods, sinusoids, bowties, tapers, nanogaps, and gratings, along the NW growth axis. Rapid modulation of phosphorus doping combined with selective wetchemical etching enabled morphological features as small as 10 nm to be patterned over wires more than 50 μm in length. This capability fundamentally expands the set of technologies that can be realized with Si NWs, and as proof-of-concept, we demonstrate two distinct applications. First, nanogap-encoded NWs were used as templates for Noble metals, yielding plasmonic structures with tunable resonances for surface-enhanced Raman imaging. Second, core/shell Si/SiO2 nanorods were integrated into electronic devices that exhibit resistive switching, enabling nonvolatile memory storage. Moving beyond these initial examples, we envision this method will become a generic route to encode new functionality in semiconductor NWs. KEYWORDS: Silicon nanowire, bottom-up lithography, plasmonics, surface-enhanced Raman spectroscopy, resistive switching
M
efforts to alter the NW geometry and encode specific morphology. For example, controlled vapor−solid overcoating on the NW surface has been used to create tapered structures25 and periodic variations in morphology.26 In addition, modulation of the size of the metal catalyst during growth has been shown to provide control over the NW diameter.27,28 For metal NWs, electrodeposition in metal oxide templates followed by wet-chemical etching has been used to create wires with alternating, nanoscale structures.29,30 However, a method for accurate, nanometer-scale control of morphology in singlecrystalline semiconductor NWs has not been developed. Here, we demonstrate a new method to achieve this type of highfidelity shape control, a process which we term “ENGRAVE” for “Encoded Nanowire GRowth and Appearance through VLS and Etching.” The key aspects and capabilities of this method are illustrated in Figure 1 and elaborated below. Si NWs were grown by a VLS mechanism in a home-built, hot-wall chemical vapor deposition (CVD) system at 420 °C using Au nanoparticles as catalysts, silane (SiH4) as the source of Si, and hydrogen (H2) as the carrier gas (see the Supporting Information for details). As illustrated schematically in Figure 1A, an additional flow of phosphine (PH3) was rapidly modulated during growth20 to encode varying levels of P, an n-type substitutional dopant with high solubility in Si.31−33 The etch rate of doped Si with aqueous KOH solution is wellknown to decrease with higher dopant concentration.34 This
ost semiconductor technologies rely on the ability to pattern materials with nanometer-scale features using top-down lithographic tools. Over the past decade, however, bottom-up chemical methods to control the size, shape, and composition of nanoscale materials have progressed rapidly, resulting in a diverse set of well-controlled morphologies including dots, rods, ribbons, and wires.1−3 Semiconductor nanowires (NWs) are recognized as an especially important technological building block because the high aspect ratio can be used for longitudinal transport of electrical or optical signals.1,2 A variety of devices have been demonstrated, including sensors,4 waveguides,5 phase-change memory,6 lightemitting diodes,7 and solar cells.8−11 Nevertheless, current NWbased technology has been limited by the material’s translational symmetry and the inability to pattern arbitrary, nanometer-scale morphological features. NWs are typically synthesized using the vapor−liquid−solid (VLS) mechanism,12 in which a metal nanoparticle catalyzes one-dimensional growth of a single-crystalline semiconductor material. Advancements in VLS-based technologies have generally involved synthesis of new materials or heterostructures.13 For instance, NW superlattices, in which the composition of a NW is modulated along the growth axis, have been reported for Si/SiGe,14 GaAs/GaP,15 InAs/InP,16,17 Zndoped InP,18 CdSe/ZnSe,19 and P-doped Si.20 Modulation of NW growth conditions often results in crystallographic twin planes and faceting of the NW surface, providing some capability to control morphology during synthesis.17,18,21,22 In addition, NW superstructures have been reported in the form of controllably kinked NWs that break the one-dimensional shape.23,24 Nevertheless, only a handful of reports describe © 2013 American Chemical Society
Received: October 18, 2013 Revised: November 13, 2013 Published: November 25, 2013 6281
dx.doi.org/10.1021/nl403909r | Nano Lett. 2013, 13, 6281−6286
Nano Letters
Letter
NW growth time is directly proportional to spatial length scale. Quantitative analysis of the NW growth rate yielded a value of 213 ± 6 nm/min, which was used throughout this work to convert growth times to length scales. This rate is comparatively slow because of the low CVD temperature, 420 °C, chosen to minimize radial overcoating and doping of the NW surface, a known problem during Si NW synthesis.37,38 By minimizing the overcoating, we could encode high-fidelity nanoscale features over macroscopic length scales, as exemplified in Figure 2A by the 400 nm pitch grating encoded over 50 μm of a single NW. For the synthesis of NWs with complex morphology, we measured the etch rate of Si NWs encoded with P doping levels ranging from 5.0 × 1020 to less than 1.0 × 1019 dopants/cm3, as depicted in Figure 2B. Note that these doping levels were calculated from the gas-phase ratio of Si to P during CVD growth and the actual values could be lower as a result of incomplete P incorporation.33 Quantitative evaluation of the etch rate reveals a nonlinear dependence on doping level that is well approximated with a single exponential function and varies from 2.1 nm/s for “intrinsic” segments with doping levels
Synthetically Encoding 10 nm Morphology in Silicon Nanowires Joseph D. Christesen,† Christopher W. Pinion,† Erik M. Grumstrup, John M. Papanikolas, and James F. Cahoon* Department of Chemistry, University of North Carolina at Chapel Hill, Chapel Hill, North Carolina 27599-3290, United States S Supporting Information *
ABSTRACT: Si nanowires (NWs) have been widely explored as a platform for photonic and electronic technologies. Here, we report a bottom-up method to break the conventional “wire” symmetry and synthetically encode a high-resolution array of arbitrary shapes, including nanorods, sinusoids, bowties, tapers, nanogaps, and gratings, along the NW growth axis. Rapid modulation of phosphorus doping combined with selective wetchemical etching enabled morphological features as small as 10 nm to be patterned over wires more than 50 μm in length. This capability fundamentally expands the set of technologies that can be realized with Si NWs, and as proof-of-concept, we demonstrate two distinct applications. First, nanogap-encoded NWs were used as templates for Noble metals, yielding plasmonic structures with tunable resonances for surface-enhanced Raman imaging. Second, core/shell Si/SiO2 nanorods were integrated into electronic devices that exhibit resistive switching, enabling nonvolatile memory storage. Moving beyond these initial examples, we envision this method will become a generic route to encode new functionality in semiconductor NWs. KEYWORDS: Silicon nanowire, bottom-up lithography, plasmonics, surface-enhanced Raman spectroscopy, resistive switching
M
efforts to alter the NW geometry and encode specific morphology. For example, controlled vapor−solid overcoating on the NW surface has been used to create tapered structures25 and periodic variations in morphology.26 In addition, modulation of the size of the metal catalyst during growth has been shown to provide control over the NW diameter.27,28 For metal NWs, electrodeposition in metal oxide templates followed by wet-chemical etching has been used to create wires with alternating, nanoscale structures.29,30 However, a method for accurate, nanometer-scale control of morphology in singlecrystalline semiconductor NWs has not been developed. Here, we demonstrate a new method to achieve this type of highfidelity shape control, a process which we term “ENGRAVE” for “Encoded Nanowire GRowth and Appearance through VLS and Etching.” The key aspects and capabilities of this method are illustrated in Figure 1 and elaborated below. Si NWs were grown by a VLS mechanism in a home-built, hot-wall chemical vapor deposition (CVD) system at 420 °C using Au nanoparticles as catalysts, silane (SiH4) as the source of Si, and hydrogen (H2) as the carrier gas (see the Supporting Information for details). As illustrated schematically in Figure 1A, an additional flow of phosphine (PH3) was rapidly modulated during growth20 to encode varying levels of P, an n-type substitutional dopant with high solubility in Si.31−33 The etch rate of doped Si with aqueous KOH solution is wellknown to decrease with higher dopant concentration.34 This
ost semiconductor technologies rely on the ability to pattern materials with nanometer-scale features using top-down lithographic tools. Over the past decade, however, bottom-up chemical methods to control the size, shape, and composition of nanoscale materials have progressed rapidly, resulting in a diverse set of well-controlled morphologies including dots, rods, ribbons, and wires.1−3 Semiconductor nanowires (NWs) are recognized as an especially important technological building block because the high aspect ratio can be used for longitudinal transport of electrical or optical signals.1,2 A variety of devices have been demonstrated, including sensors,4 waveguides,5 phase-change memory,6 lightemitting diodes,7 and solar cells.8−11 Nevertheless, current NWbased technology has been limited by the material’s translational symmetry and the inability to pattern arbitrary, nanometer-scale morphological features. NWs are typically synthesized using the vapor−liquid−solid (VLS) mechanism,12 in which a metal nanoparticle catalyzes one-dimensional growth of a single-crystalline semiconductor material. Advancements in VLS-based technologies have generally involved synthesis of new materials or heterostructures.13 For instance, NW superlattices, in which the composition of a NW is modulated along the growth axis, have been reported for Si/SiGe,14 GaAs/GaP,15 InAs/InP,16,17 Zndoped InP,18 CdSe/ZnSe,19 and P-doped Si.20 Modulation of NW growth conditions often results in crystallographic twin planes and faceting of the NW surface, providing some capability to control morphology during synthesis.17,18,21,22 In addition, NW superstructures have been reported in the form of controllably kinked NWs that break the one-dimensional shape.23,24 Nevertheless, only a handful of reports describe © 2013 American Chemical Society
Received: October 18, 2013 Revised: November 13, 2013 Published: November 25, 2013 6281
dx.doi.org/10.1021/nl403909r | Nano Lett. 2013, 13, 6281−6286
Nano Letters
Letter
NW growth time is directly proportional to spatial length scale. Quantitative analysis of the NW growth rate yielded a value of 213 ± 6 nm/min, which was used throughout this work to convert growth times to length scales. This rate is comparatively slow because of the low CVD temperature, 420 °C, chosen to minimize radial overcoating and doping of the NW surface, a known problem during Si NW synthesis.37,38 By minimizing the overcoating, we could encode high-fidelity nanoscale features over macroscopic length scales, as exemplified in Figure 2A by the 400 nm pitch grating encoded over 50 μm of a single NW. For the synthesis of NWs with complex morphology, we measured the etch rate of Si NWs encoded with P doping levels ranging from 5.0 × 1020 to less than 1.0 × 1019 dopants/cm3, as depicted in Figure 2B. Note that these doping levels were calculated from the gas-phase ratio of Si to P during CVD growth and the actual values could be lower as a result of incomplete P incorporation.33 Quantitative evaluation of the etch rate reveals a nonlinear dependence on doping level that is well approximated with a single exponential function and varies from 2.1 nm/s for “intrinsic” segments with doping levels
