sensors Article

Substrate and Passivation Techniques for Flexible Amorphous Silicon-Based X-ray Detectors Michael A. Marrs 1, * and Gregory B. Raupp 2 1 2

*

Flexible Electronics and Display Center, Arizona State University, Tempe, AZ 85284, USA School for Engineering of Matter, Transport, and Energy, Arizona State University, Tempe, AZ 85287, USA; [email protected] Correspondence: [email protected]; Tel.: +1-480-727-6898

Academic Editor: Gonzalo Pajares Martinsanz Received: 23 May 2016; Accepted: 19 July 2016; Published: 26 July 2016

Abstract: Flexible active matrix display technology has been adapted to create new flexible photo-sensing electronic devices, including flexible X-ray detectors. Monolithic integration of amorphous silicon (a-Si) PIN photodiodes on a flexible substrate poses significant challenges associated with the intrinsic film stress of amorphous silicon. This paper examines how altering device structuring and diode passivation layers can greatly improve the electrical performance and the mechanical reliability of the device, thereby eliminating one of the major weaknesses of a-Si PIN diodes in comparison to alternative photodetector technology, such as organic bulk heterojunction photodiodes and amorphous selenium. A dark current of 0.5 pA/mm2 and photodiode quantum efficiency of 74% are possible with a pixelated diode structure with a silicon nitride/SU-8 bilayer passivation structure on a 20 µm-thick polyimide substrate. Keywords: flexible electronics; flexible displays; flexible X-ray detectors; amorphous silicon PIN diodes; passivation

1. Introduction 1.1. Flexible Electronics Flexible electronics are becoming more prevalent as previously developed flexible active matrix display technology is being implemented to produce a wide variety of photo-based biomedical sensing devices [1,2], including flexible X-ray detectors [3]. The primary immediate benefit of switching from conventional display glass to flexible substrates in digital radiography is the cost savings associated with the elimination of the significant ruggedization that must be incorporated to limit detector breakage. Portable radiography has seen expansive growth into non-medical markets, such as security imaging and non-destructive testing for integrity analysis (i.e., looking for cracks in pipelines or inspection of aircraft structures). Though some portable X-ray panels do exist, they are comprised of glass thin film transistor (TFT) panels, and are rather bulky due to the ruggedization required to protect the costly panel from breakage. Given the cost of these panels, it would be advantageous to have a more rugged system that would be less prone to breakage and be much lighter for mobile users to carry. Along with being both portable and lightweight, a digital X-ray panel with some degree of flexibility or bendability is also an appealing medical diagnostic or industrial imaging tool, especially if the overall digital X-ray detector thickness can be also minimized. A paramedic would be able to easily slide a thin and slightly flexible digital X-ray detector panel directly underneath the victim of

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a car accident at the scene, or an inspector could wrap the X-ray detector around a possibly cracked oil pipeline. The relatively rapid development of flexible X-ray detectors and imagers has been enabled by the fact that existing active matrix thin film transistor flexible display technology can be easily ported to amorphous silicon (a-Si)-based indirect digital X-ray detectors, which have a similar underlying platform structure to liquid crystal displays (LCD). The principal new challenge to be addressed is flex-compatible fabrication of photodiodes in series with the thin film transistor at each pixel. 1.2. X-ray Source and Detector Structure and Operation An X-ray source typically consists of a vacuum tube in which high voltage (i.e., 30–150 kV) electrons are accelerated into a metallic anode. The accelerated electrons pass close to the nuclei of the target material, or strike an inner shell electron in some cases, and produce an X-ray as the electron is slowed considerably by the opposing charge of the nucleus [4]. In the event of an inner electron shell collision, an electron from the outer shell moves into the vacancy in the inner shell and gives off an X-ray with energy that is characteristic of the anode material. The energy of the X-rays can be attenuated by a filter (which can be aluminum or carbon), producing a target energy range of 70–80 keV. X-rays from the source pass through the patient or device under examination, with some of the X-rays attenuated by the nuclei of the intervening material. At the kilovolt energies typically employed by medical X-ray detectors, attenuation is usually the result of photoelectric absorption or Compton scattering. Photoelectric absorption produces meaningful data because an X-ray photon is absorbed and releases an electron from the absorbing atom. The X-ray absorption is proportional to the atomic number, the density, and the thickness of the absorbing media [5]. As an example, bone—which has a higher effective atomic number and is relatively dense—will absorb more X-rays than soft tissue, which results in a contrast difference in the completed radiograph. X-rays that do pass through the patient are absorbed by the detector. A flat panel digital X-ray detector is usually classified as direct conversion or indirect conversion, depending on the process for converting the incident X-rays into charge. Direct conversion detectors utilize a photoconductive layer of amorphous selenium, which absorb the X-ray and produce an electron/hole pair. When a bias is applied across the selenium, the generated charge carriers are pulled towards the electrodes. When an X-ray is absorbed and generates an electron/hole pair, the charge carrier is drawn to the opposing electrode with limited scattering in comparison to indirect detection techniques [6]. However, the amorphous selenium has a smaller capture cross-section in comparison to the cesium iodide (CsI) screens used in indirect conversion, thus requiring the patient to be exposed to a higher dosage of X-rays to achieve the same resolution. In addition, the selenium film is usually 0.25–1.0 mm thick, requiring a large voltage on the order of 10 kV across the selenium to provide a sufficient electric field to extract the incident X-ray-generated charge carriers [6]. The basic components of an indirect digital X-ray detector include a scintillator phosphor conversion film that converts the incident X-rays into visible photons, a photodiode—usually amorphous silicon with organic photodiodes as an emerging competing technology—that detects the light emitted from the X-ray phosphor conversion film and converts the light into an electric charge, and a thin film transistor (TFT) that acts as a switch for the readout of the charge stored in the photodiode in between readout. In that sense, the operation of a digital X-ray detector can be compared to a large digital camera. The scintillator is typically composed of high capture cross section materials like cesium or the rare earth elements doped with a phosphor whose peak emission is in the visible spectrum usually between 500 and 550 nm for detectors manufactured with a-Si photodiodes. The a-Si photodiode is operated under reverse bias between ´2 and ´5 V so that the photocurrent dominates the total current flowing through the photodiode. The a-Si is grown to a thickness of 1.0 to 1.2 µm, which is more than adequate to capture most of the incident green light produced by the scintillator.

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The TFTs are laid out in a grid similar to an LCD display, where the gate lines are scanned sequentially Sensors 2016, 16, 1162 3 of 14 and the charge stored on the source line is read out at the edge of the array.

1.3. Flexible Indirect X-Ray Detectors 1.3. Flexible Indirect X-ray Detectors The simplest photodiode fabrication approach is to pattern the n-Si layer of the photodiode at The simplest photodiode fabrication approach is to pattern the n-Si layer of the photodiode at each each pixel, and to blanket deposit the i-Si, p-Si, and transparent conductor top metal contact pixel, and to blanket deposit the i-Si, p-Si, and transparent conductor top metal contact continuously continuously over the entire array. A major advantage of this full fill factor approach is that the entire over the entire array. A major advantage of this full fill factor approach is that the entire pixel is covered pixel is covered by the i-Si absorption layer, thus eliminating any “dead” spots in the pixel where by the i-Si absorption layer, thus eliminating any “dead” spots in the pixel where photon strikes will photon strikes will not be detected. This full fill factor approach also produces the smallest pixel size not be detected. This full fill factor approach also produces the smallest pixel size (and hence highest (and hence highest resolution) for a given set of design rules. For example, for X-ray detectors resolution) for a given set of design rules. For example, for X-ray detectors currently fabricated at the currently fabricated at the Flexible Electronics and Display Center, we produce 50 ppi full fill factor Flexible Electronics and Display Center, we produce 50 ppi full fill factor arrays, compared to much arrays, compared to much larger 83 ppi for pixelated diode arrays. larger 83 ppi for pixelated diode arrays. There are some significant processing drawbacks to the full fill factor design that are exacerbated There are some significant processing drawbacks to the full fill factor design that are exacerbated by the use of polyethylene naphthalate (PEN) as a flexible substrate. Since there is a large coefficient by the use of polyethylene naphthalate (PEN) as a flexible substrate. Since there is a large coefficient of thermal expansion (CTE), mismatch between PEN and amorphous silicon (13 ppm/°C˝ versus 3 of thermal expansion (CTE), mismatch between PEN and amorphous silicon (13 ppm/ C versus ppm/°C), coupled with the high intrinsic compressive film stress of the i-Si layer detectors, arrays 3 ppm/˝ C), coupled with the high intrinsic compressive film stress of the i-Si layer detectors, arrays fabricated with the full fill factor approach have a tendency to curl significantly after post-fabrication fabricated with the full fill factor approach have a tendency to curl significantly after post-fabrication debonding of the flexible substrate. In addition, the deposition process for the amorphous silicon debonding of the flexible substrate. In addition, the deposition process for the amorphous silicon diode diode layers takes place ˝at 200 °C, which is near the melting temperature of the PEN (240 °C), and layers takes place at 200 C, which is near the melting temperature of the PEN (240 ˝ C), and can take can take upwards of one hour to deposit the requisite 1.2 µ m-thick film. The extended exposure at upwards of one hour to deposit the requisite 1.2 µm-thick film. The extended exposure at the elevated the elevated temperature of the PECVD (plasma enhanced chemical vapor deposition) process risks temperature of the PECVD (plasma enhanced chemical vapor deposition) process risks embrittling embrittling the PEN and ruining the detector. In spite of these drawbacks, full fill factor X-ray the PEN and ruining the detector. In spite of these drawbacks, full fill factor X-ray detectors on PEN detectors on PEN substrates have been successfully demonstrated by multiple groups [3,7,8]. substrates have been successfully demonstrated by multiple groups [3,7,8]. Previous results from the Previous results from the Flexible Electronics and Display Center are shared below in Figure 1. If the Flexible Electronics and Display Center are shared below in Figure 1. If the i-Si deposition process is i-Si deposition process is not tightly controlled, stress-related failure, as shown in Figure 1, may occur. not tightly controlled, stress-related failure, as shown in Figure 1, may occur.

Figure 1. Full fill fill factor factor digital digital X-ray X-ray detector backplane showing showing stress stress related related failure failure due due to to high Figure 1. Full detector backplane high intrinsic film stress in the i-Si layer. intrinsic film stress in the i-Si layer.

In spite of these drawbacks, amorphous silicon photodiodes photodiodes are more desirable desirable for large area detectors than direct conversion amorphous selenium detectors because the amorphous silicon is significantly thinner (1.2 µm µ m [3] vs. 100 µµm m [7]), enabling enabling a tighter tighter bending bending radius. radius. Moreover, Moreover, PECVD amorphous silicon can be deposited with better uniformity uniformity over over large areas than the thermally evaporated amorphous selenium. Amorphous Amorphous silicon silicon photodiodes photodiodes are are preferable preferable over organic photodiodes due to the air and moisture instability of organic photodiodes under irradiation, which requires a sufficiently robust moisture and oxidation barrier to prolong the life of the detector [9]. Another method for alleviating stress in the entire film stack is to use a flexible substrate whose coefficient of thermal expansion is a closer match to that of the deposited thin films. Polyimides are

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photodiodes due to the air and moisture instability of organic photodiodes under irradiation, which requires a sufficiently robust moisture and oxidation barrier to prolong the life of the detector [9]. Another method for alleviating stress in the entire film stack is to use a flexible substrate whose coefficient of thermal expansion is a closer match to that of the deposited thin films. Polyimides are a class of flexible substrate materials receiving considerable attention because of their compatible thermal properties. The main advantages of polyimides over PEN as a substrate are that the coefficient of thermal expansion for polyimide is roughly four times smaller than PEN, while the safe operating temperature is roughly 200 ˝ C higher. A comparison of the thermal properties of HD Microsystems PI 2611 [10], a polyimide, DuPont Teonex Q51 [11], and silicon [12,13] are shown below in Table 1. Table 1. Comparison of structural, thermal, and electrical properties of polyimide, polyethylene naphthalate (PEN), and silicon.

Tensile Strength Glass Transition Temperature Continuous Operation Temperature Melting Temperature Coefficient of Thermal Expansion Dielectric Constant

HD Microsystems PI 2611

DuPont Teonex Q51 PEN

Silicon

Units

350 360

274.6 121

7000 -

MPa ˝C

-

180

-

˝C

620 (decomposes) 3 2.9

269 13 3

1415 2.6 11.9

˝C ppm/˝ C

The increased operating temperature of the polyimide would allow for safe processing of a-Si at temperatures above 275 ˝ C, which is a typical deposition temperature for high quality TFT and PIN diode a-Si films, without the risk of significant thermal damage to the substrate. In addition, the coefficient of thermal expansion of the PI 2611 is within 0.4 ppm/˝ C of silicon, meaning that it is less likely that intrinsic stress associated with a-Si deposition will cause polyimide substrates to physically curl once they are debonded from the carrier. 2. Materials and Methods 2.1. Substrate Preparation: Polyethylene Naphthalate (PEN) Bond/Debond The bond/debond (or temporary bonding process) allows the processing of a flexible substrate bonded temporarily to a rigid carrier in conventional semiconductor or flat panel display (FPD) process tools that are built to handle rigid Si or glass substrates. The basic process flow for the bond process is shown in Figure 2a [14], where it is compared to the polyimide cast and debond process, which is described in the next sub-section. A temporary adhesive is spin-coated on to a rigid carrier. If the adhesive is thermally cured, a bake usually follows the spin process. The flexible substrate, in this case polyethylene naphthlate (PEN), is then mounted to the adhesive-coated carrier using a roll laminator. The adhesive is cured either by UV exposure, by baking, or with a combination of both. The rigid carrier suppresses the bowing of the flexible substrate during processing to provide the requisite dimensional stability during device fabrication. Following device fabrication, the flexible substrate can be debonded from the rigid carrier to yield a flexible electronics device (display, sensor array, detector). The main advantage of the bond/debond process is that the process requires little additional investment to an already existing display or semiconductor fabrication facility and is scalable to larger area substrates without significant alterations to the process. The main disadvantage of the bond/debond process is related to controlling substrate deformation (i.e., warp and bow), which can cause wafer handling and pattern alignment issues, substrate distortion, and in extreme cases delamination of the flexible substrate during processing. However, Haq, et al. have demonstrated a suitable distortion-free bond/debond process with controlled warp/bow that is capable of effective processing up to 200 ˝ C [15].

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Figure 2. Bond/debond and polyimide coat/debond process flow. TFT: thin film transistor. Figure 2. Bond/debond and polyimide coat/debond process flow. TFT: thin film transistor.

2.2. Substrate Preparation: Polyimide Cast and Debond Process 2.2. Substrate Preparation: Polyimide Cast and Debond Process The polyimide cast and debond process is an attractive alternative to the EPLaR (Electronics on The polyimide cast and debond process is an attractive alternative to the EPLaR (Electronics on Plastic by Laser Release) [16] process, where slot die coating is used to cast polyimide as the base Plastic by Laser Release) [16] process, where slot die coating is used to cast polyimide as the base substrate onto a display glass substrate, as shown in Figure 2b. The adhesion strength of the polyimide substrate onto a display glass substrate, as shown in Figure 2b. The adhesion strength of the is selectively modified at the edge of the carrier by applying an adhesion promoter such as VM652 from polyimide is selectively modified at the edge of the carrier by applying an adhesion promoter such HD Microsystems. The increased adhesion strength at the edge significantly reduces edge-initiated as VM652 from HD Microsystems. The increased adhesion strength at the edge significantly reduces debonding. However, the polyimide-to-glass adhesion strength has been tailored to be significantly edge-initiated debonding. However, the polyimide-to-glass adhesion strength has been tailored to be smaller than adhesion strength of the polyimide to the adhesion promoter, thus eliminating the significantly smaller than adhesion strength of the polyimide to the adhesion promoter, thus need for excimer laser melting of an interfacial layer to release polyimide, as in the EPLaR process. eliminating the need for excimer laser melting of an interfacial layer to release polyimide, as in the After the polyimide is cured at 375 ˝ C in an inert atmosphere, a PECVD silicon nitride (SiN) barrier EPLaR process. After the polyimide is cured at 375 °C in an inert atmosphere, a PECVD silicon nitride film is applied to protect the polyimide from future processing steps and to reduce the water vapor (SiN) barrier film is applied to protect the polyimide from future processing steps and to reduce the transmission rate (WVTR) of the polyimide. The TFT and PIN diode processing steps can proceed water vapor transmission rate (WVTR) of the polyimide. The TFT and PIN diode processing steps once the barrier is deposited. can proceed once the barrier is deposited. After the device layers are fabricated, the backplane is cut inside the adhesion promotion layer After the device layers are fabricated, the backplane is cut inside the adhesion promotion layer picture frame and is removed manually. The adhesion promotion layer remains bonded to the glass picture frame and is removed manually. The adhesion promotion layer remains bonded to the glass carrier substrate along with a polyimide picture frame, which can now be reclaimed if desired. The curl carrier substrate along with a polyimide picture frame, which can now be reclaimed if desired. The of the polyimide substrate after debond depends on the formulation of the polyimide spin/spray curl of the polyimide substrate after debond depends on the formulation of the polyimide spin/spray casting solution and adhesion layer. The control of the post-debond curl is the biggest challenge of the casting solution and adhesion layer. The control of the post-debond curl is the biggest challenge of polyimide process. the polyimide process. 2.3. PIN Diode Processing and Device Structure 2.3. PIN Diode Processing and Device Structure Figure 3 is a cross-sectional schematic that illustrates the basic full fill factor pixel design. The grey Figure is highlights a cross-sectional thatThe illustrates full fill factor pixelthe design. The dashed line 3box the PINschematic diode layers. currentthe fullbasic fill factor design places PIN diode grey dashed line box highlights the PIN diode layers. The current full fill factor design places the PIN diode over the top of the TFT and uses an indium tin oxide (Siommon electrode for the Vbias

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over the top of the TFT and uses an indium tin oxide (Siommon electrode for the Vbias connection connection on the p-doped side of the PIN diode. The i-Si, p-Si, and ITO blanket the entire X-ray on the p-doped side of the PIN diode. The i-Si, p-Si, and ITO blanket the entire X-ray detector array, detector array, and are etched outside the array in the field and over the driver connections. and are etched outside the array in the field and over the driver connections. Processing of the full fill Processing of the full fill factor design was described previously [3,17]. The maximum processing factor design was described previously [3,17]. The maximum processing temperature for the device temperature for the device is 200 °C. is 200 ˝ C.

Figure 3. Full fill factor PIN photodiode photodiode connected connectedin inseries seriesto toaaTFT. TFT.The Theinterlayer interlayerdielectric dielectric(ILD) (ILD)isisa acombination combinationofofSU-8 SU-8(MicroChem) (MicroChem)and andSiN. SiN.The Theactive activelayer layeris is amorphous amorphous Si and the gate dielectric, dielectric, mesa passivation, and intermetal dielectric (IMD) are SiN. SiN

Although thefull fullfillfill factor design provides a smaller-area, higher resolution pixel when Although the factor design provides a smaller-area, higher resolution pixel when subjected subjected to the same design rules as alternative pixelated structures [18], there are some potential to the same design rules as alternative pixelated structures [18], there are some potential disadvantages disadvantages as well. For the example, since the i-Si is blanket themore array, it imparts as well. For example, since i-Si is blanket deposited across deposited the array, itacross imparts stress on the more stress on the substrate system the i-Si layer were patterned. In addition, is also substrate system than if the i-Si layer than were ifpatterned. In addition, there is also potential there for crosstalk potential for crosstalk the elements in the arrays, since photons absorbed physically a between the elements between in the arrays, since photons absorbed physically over a certain pixel over could certain could be read outpixel by abecause neighboring pixel because the i-Si over film is continuous over instead pixel be read outinstead by a neighboring the i-Si film is continuous the entire array. the entire array. Figure 4 is a cross-sectional schematic that illustrates the basic design for the alternative pixelated 4 is aThe cross-sectional that highlights illustrates the the PIN basicdiode design for the alternative diodeFigure approach. grey dashed schematic line box again layers. Pixelating the pixelated diode approach. The grey dashed line box again highlights the PIN diode layers. Pixelating photodiode requires the Vbias connection to the p-doped side of the diode to be made using a the photodiode requires metal the Vbias connection to readout the p-doped sidealso of the made using a subsequently deposited deposition. The lines can be diode movedtotobe this subsequent subsequently deposited metal deposition. The readout lines can also be moved to this subsequent deposition step and then connected down to the TFT through a via at each pixel. This modification deposition and then connectedbetween down tothe thegate TFTlines through a viareadout at eachlines, pixel.which This modification enables thestep maximum separation and the reduces the enables the maximum separation between the gate lines and the readout lines, which reduces the parasitic capacitance (noise) between the two. The separation of the diode and the TFT reduces the area parasitic between the15% two. separation theµm diode andµm thepixel TFTcompared reduces the available capacitance for detection(noise) by approximately in The a detector with aof207 by 207 to area available for detection by approximately 15% in a detector with a 207 µ m by 207 µ m pixel the full fill factor design present in Figure 3 with the same pixel area. compared to the fullPIN fill factor present in Figure 3 with theconnection same pixelwith area.any opaque metal The patterned diodedesign structure replaces the ITO Vbias The patterned PIN diode structurewt% replaces thealloy ITO is Vbias connection with any opaque between metal of of choice. If a sputtered aluminum/1 silicon used, the resistivity difference choice. If a sputtered aluminum/1 wt% silicon alloy is used, the resistivity difference between the the sputtered aluminum/silicon alloy and ITO is over a factor of 100 (4.1 µΩ-cm vs. 528 µΩ-cm), sputtered aluminum/silicon alloy and ITO is over a factor of 100 (4.1 µΩ-cm vs. 528 µΩ-cm), which which should provide an immediate benefit by reducing the series resistance in the device. The ITO should benefit by reducing the series resistance inasthe device.constraints. The ITO thicknessprovide and thusantheimmediate sheet resistance is governed by optical constraints as well electrical thickness and thus the sheet resistance is governed by optical constraints as well as electrical Specifically, the ITO layer needs to act as an anti-reflection coating at the target wavelength for the constraints. layerof needs to X-ray act asdetector an anti-reflection at the target detection of Specifically, incident light.the In ITO the case a digital using a CsI coating scintillator, the target wavelength for the detection of incident light. In the case of a digital X-ray detector using CsI light wavelength for detection is the peak emission wavelength of the scintillator (roughly 525anm). scintillator, the target light wavelength for detection is the peak emission wavelength of the The ideal ITO thickness to produce minimum reflection at this wavelength is approximately 65 nm scintillator (roughlyfrom 525 nm). ideal ITO thickness produce minimum reflection this thick, as calculated Snell’sThe Law. However, the Vbiastoconnection in the pixelated PINatdiode wavelength is approximately 65 nm thick, as calculated from Snell’s Law. However, the Vbias connection in the pixelated PIN diode structure depicted in Figure 4 does not have such optical constraints because the layer is so thick that it is sufficiently opaque to most visible light and only

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structure depicted in Figure 4 does not have such optical constraints because the layer is so thick covers a small portionopaque of the photodiode. This feature the separate and that it is sufficiently to most visible light andallows only covers a smallcontrol portionofofthe theelectrical photodiode. optical properties of the V bias connection. This feature allows the separate control of the electrical and optical properties of the Vbias connection.

Figure Figure4. 4.Patterned PatternedPIN PINphotodiode photodiodeconnected connected in in series series to to aa TFT. TFT.

By using the aluminum/silicon alloy as the Vbias connection over ITO, the series resistance can be By using the aluminum/silicon alloy as the Vbias connection over ITO, the series resistance can significantly reduced while still maintaining the optical properties necessary to maximize photon be significantly reduced while still maintaining the optical properties necessary to maximize photon absorption in the photodiode. Series resistance is a parasitic, power consuming parameter whose absorption in the photodiode. Series resistance is a parasitic, power consuming parameter whose effect on the diode performance is illustrated by equation (1), which is a modification of the ideal effect on the diode performance is illustrated by equation (1), which is a modification of the ideal diode model: diode model: ˆ ˙ qpVbias ´ID Rs q 1 nkT I D Rs´ ID “ IS  e q Vbias (1) 

(1) I D  I S  e nkT  1 where ID is the diode current, IS is the reverse saturation current, q is the charge of an electron, Vbias   is the voltage applied across the diode, Rs is the series resistance, n is the diode ideality factor, k is Boltzmann’s constant, and T isISthe temperature. The maincurrent, contribution tocharge series resistance comesVfrom where ID is the diode current, is the reverse saturation q is the of an electron, bias is the voltage diode contact resistance, resistance of series the diode layers, and of the ktop the applied across thebulk diode, Rs is the resistance, n is the the sheet dioderesistance ideality factor, is metal layer [19]. The deleterious effects of series resistances are most noticeable at resistance voltages near the Boltzmann’s constant, and T is the temperature. The main contribution to series comes open the circuit voltage of the photodiode as a deviation in the slope the I–V curve resistance from the vertical from diode contact resistance, bulk[20] resistance of the diode layers,ofand the sheet of the affecting quantum efficiency in extreme cases [19]. top metalthe layer [19]. The deleterious effects of series resistances are most noticeable at voltages near the open circuit voltage of the photodiode [20] as a deviation in the slope of the I–V curve from the 2.4. PIN Diode Test Setup vertical affecting the quantum efficiency in extreme cases [19]. 2.4.1. L-I-V Sweeps of 1 mm2 Diodes 2.4. PIN Diode Test Setup PIN diode test structures with an area of 1 mm2 were separately fabricated side-by-side with the 2.4.1. of 1monitor mm2 Diodes main L-I-V arraysSweeps to test and the performance of the full fill factor and pixelated PIN diodes. A probe station fitted with a Keithley 4200 wasside-by-side used to characterize 2 were separatelySystem PIN diode test structures withSemiconductor an area of 1 mmCharacterization fabricated with the the diode performance. The probe on the probe station is fitted a green LED main arrays to test and monitor thecard performance of the full fill factor with and pixelated PINilluminator diodes. A 2 at the device surface. (peak emission wavelength 520 nm), 4200 whichSemiconductor generates an irradiance 102 W/mSystem probe station fitted with aofKeithley Characterization was used to The diode is swept from ´5 V to +1 V in the dark and again with the illuminator set maximum characterize the diode performance. The probe card on the probe station is fitted with to a green LED current. The fill factor, open circuit voltage (V ), and short circuit current (I ) are extracted the OC SC 2 at the illuminator (peak emission wavelength of 520 nm), which generates an irradiance 102 W/mfrom irradiated curve. The dark characteristics are fitted to the ideal diode equation, which yields the diode device surface. The diode is swept from −5 V to +1 V in the dark and again with the illuminator set to saturation current In addition, the(V minimum dark current, the dark current maximum current.and Thethe fillideality factor, factor. open circuit voltage OC), and short circuit current (ISC) are at ´5 V, and the dark current at +1 V are extracted to indirectly track the resistance series extracted from the irradiated curve. The dark characteristics are fitted toshunt the ideal diode and equation, resistance, as well as the magnitude of the dark current. After the sweeps are completed, the diode is which yields the diode saturation current and the ideality factor. In addition, the minimum dark held at ´5 in thecurrent dark asatthe read the current additional times, with current, theVdark −5 prober V, andcontinues the dark to current at +1 V arean extracted to 120 indirectly trackeach the reading commencing once the previous reading has collected sufficient charge to be safely above the shunt resistance and series resistance, as well as the magnitude of the dark current. After the sweeps noise floor threshold of the are completed, the diode is tester. held at −5 V in the dark as the prober continues to read the current an

additional 120 times, with each reading commencing once the previous reading has collected sufficient charge to be safely above the noise floor threshold of the tester.

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2.4.2. Diode Array Testing 2.4.2.ADiode Array Testing custom-built array test system with readout chips was built in-house to test the arrays. The testerAwas customizable that arrays as small as chips 128 by 240built pixels or as large 1024 by 720 custom-built arraysotest system with readout was in-house to testas the arrays. Thepixels tester could be tested. The timeaswas setas to 128 20 µby s to allow fororsufficient discharge the photodiodes was customizable so gate that on arrays small 240 pixels as large as 1024 by of 720 pixels could be and theThe charge to to anallow imagefor with 12 bit range greyscale. tested. gatecollected on time was was recorded set to 20 µs sufficient discharge of the photodiodes and the charge collected was recorded to an image with 12 bit range greyscale. 3. Results 3. Results 3.1. L-I-V Sweep Comparison between Blanket and Pixelated Photodiodes 3.1. L-I-V Sweep Comparison between Blanket and Pixelated Photodiodes Figure 5A compares dark I-V characteristics of 1 mm2 diodes fabricated with a blanket PIN diode Figurewith 5A compares I-V characteristics of 1 mm2(structure diodes fabricated a blanket structure ITO top dark contact and no passivation shown with in Figure 3), PIN withdiode the structure withbehavior ITO top contact and noare passivation (structure showna in Figure 3), as with characteristic of diodes that passivated and utilizing metal strap thethe topcharacteristic Vbias contact behavior of diodes are4). passivated and utilizing a metal the top V (structure bias contact (structure shown in that Figure The passivated, pixelated PIN strap diodeas performs better than the blanket shown inunder Figureboth 4). The passivated, pixelated PIN diode performs better thanunder the blanket structure structure forward bias and reverse bias. The superior performance forward bias is under both forward bias and reverse bias. The superior performance under forward bias is likely attributable to the reduced series resistance, which is expected to dominate thelikely I-V attributable toas thethe reduced series resistance, expected to dominate thetoI-V characteristic as the characteristic voltage increases abovewhich 0.5 V.isThe primary advantage decreasing the series voltage increases above V. The advantage decreasingA the series resistance is to charge reduce resistance is to reduce the0.5 image lagprimary and prevent inversetoshadowing. lower resistance allows the image lag and prevent inverse shadowing. A lower resistance allows charge to be drained faster to be drained faster and prevents the applied bias voltage from being pulled down when reading and prevents the applied bias voltage from being pulled down when reading highly charged pixels. highly charged pixels.

Figure Figure 5. 5. (A) (A) Forward Forward and and (B) (B) Reverse Reverse dark dark I-V I-V sweep sweep comparison comparison between between blanket blanket and and pixelated pixelated PIN diodes. PIN diodes.

Under reverse bias operation—under which a photodiode will spend most of its operating Under reverse bias operation—under which a photodiode will spend most of its operating lifetime—the leakage current for the pixelated diode is lower than the blanket coated diode and stays lifetime—the leakage current for the pixelated diode is lower than the blanket coated diode and stays relatively flat with increasingly negative applied voltage (Figure 5B). relatively flat with increasingly negative applied voltage (Figure 5B). 2 When irradiated with green light at an irradiance of 102 W/m 2, the quantum efficiency is When irradiated with green light at an irradiance of 102 W/m , the quantum efficiency is calculated to be 78% for the blanket device and 74% for the pixelated device. The reduced quantum calculated to be 78% for the blanket device and 74% for the pixelated device. The reduced quantum efficiency of the pixelated device is due to reflection at the passivation interfaces. efficiency of the pixelated device is due to reflection at the passivation interfaces. 3.2. Effect of the Photodiode Passivation Layer 3.2. Effect of the Photodiode Passivation Layer 3.2.1. 3.2.1. Dark Dark Current Current vs. vs. Time Time Stability Stability The passivation layer(s) layer(s) affects affects the the final final dark dark current current characteristics. characteristics. When The nature nature of of the the passivation When no no passivation is used, the diodes are so leaky that it is difficult to consider them “diodes”. In the passivation is used, the diodes are so leaky that it is difficult to consider them “diodes”. In the example example 5, the passivation is a two-layer stack comprising spinpolymer on SUpresentedpresented in Figure in 5, Figure the passivation is a two-layer stack comprising 2.0 µm of 2.0 spinµ m onof SU-8 8and polymer 300 nm of PECVD-deposited only the SU-8 polymer is applied as the 300 nm and of PECVD-deposited SiN. If only the SiN. SU-8 If polymer is applied as the passivation layer, the passivation layer, the initial dark current behavior is greatly improved. However, the dark current initial dark current behavior is greatly improved. However, the dark current begins to degrade during begins to degrade during continuous operation under reverse6.bias, as shown in Figure 6. continuous operation under reverse bias, as shown in Figure Figure shows that that ifif only onlySiN SiNisisused usedas asthe thepassivation passivationmaterial, material,the theinitial initialdark darkcurrent current Figure 66 further further shows is is significantly larger (~10 times) than the initial dark current for SU-8-coated diodes. However, the significantly larger (~10 times) than the initial dark current for SU-8-coated diodes. However, the dark dark current exhibits a monotonically-decreasing current with time (eventually leveling off to a near

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current exhibits a monotonically-decreasing current with time (eventually leveling off to a near constant value), consistent with thermally associated the depopulation of defects/traps constant value), consistent with generated thermally leakage generated leakagewith associated with the depopulation of in the i-Si [21].inThis behavior suggests that the suggests PECVD SiN process defects/traps thetime-dependent i-Si [21]. This time-dependent behavior thatfilm thedeposition PECVD SiN film may damage the exposed PIN diode layers, potentially increasing the number of surface trap sites. deposition process may damage the exposed PIN diode layers, potentially increasing the number of If only SU-8 is used as the passivation, the dark current increases with time, suggesting that SU-8 surface trap sites. If only SU-8 is used as the passivation, the dark current increases with time, by itself maythat be an inadequate barrier, and that atmospheric contaminants suggesting SU-8 by itself atmospheric may be an contaminant inadequate atmospheric contaminant barrier, and that diffuse to thecontaminants i-Si surface and react.toThe when is coated first to avoid atmospheric diffuse thebest i-Si results surfaceare andobserved react. The bestSU-8 results are observed when photodiode damage, by SiN deposition. SU-8 is coated first tofollowed avoid photodiode damage, followed by SiN deposition. 16.0 14.0 12.0

Dark Current (pA)

10.0

8.0 6.0

3000 Å SiN

4.0

2 μm SU-8 SU-8 + SiN

2.0 0.0 0

10

20

30

40

50

60 70 Test #

80

90 100 110 120

Figure 6. 6. Dark Dark current current vs. vs. test number for for three three different different photodiode photodiode passivation passivation schemes. schemes. The The time time Figure test number interval between betweentests tests was consistent due thecurrent low current of theand diodes and the charge interval was notnot consistent due to thetolow of the diodes the charge integration integration time required the to measure time required to measure current. the current.

3.2.2. Effect 3.2.2. Effect of of Diode Diode Shape Shape The effect effect of of surface surface generation/recombination generation/recombination can the performance performance The can be be explored explored by by looking looking at at the of photodiodes with the same detection area (i.e., the surface area of the side of the diode facing the the of photodiodes with the same detection area (i.e., the surface area of the side of the diode facing incident light), with aa different different perimeter. perimeter. Square Square diodes diodes have have the the minimum minimum perimeter perimeter possible possible incident light), but but with for a given area and thus have the smallest surface area of i-Si sidewalls exposed. Diodes a for a given area and thus have the smallest surface area of i-Si sidewalls exposed. Diodes with with a rectangular shape have a larger area for potential surface recombination and generation to occur and rectangular shape have a larger area for potential surface recombination and generation to occur and thus should shouldhave haveaahigher higherdark dark current than a square diode. To illustrate this point, two different thus current than a square diode. To illustrate this point, two different diode diode geometries were investigated. Square Diode A has a 1 mm by 1 mm square cross-section geometries were investigated. Square Diode A has a 1 mm by 1 mm square cross-section exposed to exposed to the incident light, whileDiode rectangular 2 mm by 0.5 mm rectangular crossthe incident light, while rectangular B has aDiode 2 mm Bbyhas 0.5 amm rectangular cross-section exposed 2). section exposed to the incident light. Both diodes have the same capture area (1 mm 2 to the incident light. Both diodes have the same capture area (1 mm ). A t-test A t-test reveals reveals aa small small but but statistically statistically significant significant difference difference in in the the logarithm logarithm of of the the dark dark current, current, with the rectangular diodes having greater than two times the dark current of the square diodes. with the rectangular diodes having greater than two times the dark current of the square diodes. 3.2.3. Effect Ring on on Humidity Humidity Sensitivity Sensitivity 3.2.3. Effect of of aa Backside Backside Guard Guard Ring The effect effect of of the the diode diode edge edge can can also also be be illustrated illustrated by diode The by testing testing aa structure structure where where there there is is aa diode completely surrounded by another diode as a protective backside guard ring, as shown schematically completely surrounded by another diode as a protective backside guard ring, as shown schematically in Figure Figure 7. 7. The device and in The backside backside guard guard ring ring reduces reduces the the electric electric field field at at the the edge edge of of the the device and prevents prevents the depletion region from reaching the edge of the diode, thus mitigating surface leakage and the depletion region from reaching the edge of the diode, thus mitigating surface leakage and enabling enabling the capture of carriers generated outside of the active area [22]. The beneficial effects of the the capture of carriers generated outside of the active area [22]. The beneficial effects of the guard ring guard can beby enhanced by the grounding side ofas the diode, as having it float. can be ring enhanced grounding n side ofthe thendiode, opposed to opposed having it to float. Figure 8 compares dark sweeps from diodes with and without guard rings, clearly shows Figure 8 compares dark sweeps from diodes with and without guard rings, andand clearly shows that thatdevices the devices with the guard ring demonstrate a substantial reduction in the dark In current. In the with the guard ring demonstrate a substantial reduction in the dark current. addition, addition, devices with the guard ring are less sensitive to environmental conditions, specifically devices with the guard ring are less sensitive to environmental conditions, specifically humidity. humidity.

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Figure 7. Top-down drawing comparing an unguarded diode N and P terminals Figure 7. Top-down drawing comparing an unguarded PINPIN diode withwith onlyonly N and P terminals (Left); Figure 7. Top-down drawing comparing an unguarded PIN diode with only N and P terminals (Left); (Left); andPIN guarded diodewith structure added guard ring (G)toin the N and P and guarded diodePIN structure addedwith guard ring (G) in addition theaddition N and Pto terminals (Right). and guarded PIN diode structure with added guard ring (G) in addition to the N and P terminals (Right). terminals (Right).

Figure 7. Top-down drawing comparing an unguarded PIN diode with only N and P terminals (Left); and guarded PIN diode structure with added guard ring (G) in addition to the N and P terminals (Right).

Dark Current (A)

Dark Current (A) Dark Current (A)

Comparison of Guarded and Unguarded -4 Comparison ofPIN Guarded Diodesand Unguarded 10 -4 PIN Diodes 10 Guarded and Unguarded 10-5 Comparison of

-5 -4 10 1010-6 -6-7-5 10 1010 -7-8-6 10 1010 -7 -8-9 1010 10 -8 10 -10 10-9 10 10-9 10-10-11 10 -10 10 -12 10-11 10 10-11 20.0 -12 1010 -12 20.0 20.0

R²= 0.4321 PIN Diodes R²= 0.4321 R²= 0.4321

Unguarded Guarded Unguarded Guarded Unguarded Guarded R²= 0.1478

R²= 0.1478

R²= 0.1478

30.0 40.0 50.0 60.0 Relative Humidity (%) 30.0 40.0 50.0 60.0 30.0 40.0 50.0 60.0 Relative Humidity(%) (%) Relative Humidity Figure 8. Comparison of the dark current vs. relative humidity for guarded and unguarded PIN diodes. Comparison of the the dark vs.relative relativehumidity humidity for for guarded and Figure 8. Comparison of dark currentvs. vs. relative and unguarded PINPIN diodes. Figure 8. Comparison of the dark current humidity forguarded guarded and unguarded diodes.

3.2.4. Array Performance

Performance 3.2.4.3.2.4. Array Performance AnArray advantage of the pixelated PIN diode approach is that the i-Si absorbing layer is not continuous over the entire array, making it diode extremely for photons absorbed over one pixel advantage pixelated PIN approach the absorbing layer is not advantage thethe pixelated PIN diode approach isdifficult that is the i-Si layer is not continuous An An advantage ofofof the pixelated PIN diode approach isthat thatabsorbing thei-Sii-Si absorbing layer is not to continuous be read out byarray, a the neighboring pixel. This difficult reduction in cross-talk neighboring pixels results over entire array, making it extremely difficult forbetween photons absorbed over one pixel over the entire making it extremely for photons absorbed over one pixel to be read out continuous over the entire array, making it extremely difficult for photons absorbed over one pixel in to increased contrast and This improved resolution. Figure shows a between comparison between anincreased array with be read out by apixel. neighboring pixel. This reduction in 9cross-talk neighboring results by a neighboring reduction in cross-talk between neighboring pixels resultspixels in to be read out by a neighboring pixel. This reduction in cross-talk between neighboring pixels results a blanket i-Si layer andand a pixel patterned i-Si9when exposed to the same irradiance and thewith same in increased contrast improved resolution. Figure 9 shows a comparison between anwith array contrast and improved resolution. Figure shows a comparison between an array with a blanket in gate increased contrast and improved resolution. Figure 9 shows asame comparison between an array with ai-Si blanket i-Si layer and a pixel patterned i-Si when exposed to the irradiance and with the same on time for the TFT array. The pixel patterned array demonstrates a notably higher contrast, layer and a pixel patterned i-Si when exposed to the same irradiance and with the same gate on a blanket i-Si layer aTFT pixel patterned i-Si when exposed to thea same irradiance and with the same gate time forand the array. The pixel patterned arraythreshold. demonstrates a notably higher contrast, thereby suggesting that itThe operates with a lower detection time on for the TFT array. pixel patterned array demonstrates notably higher contrast, thereby gate thereby on timesuggesting for the TFT pixel patterned array demonstrates a notably higher contrast, that array. it operates with a lower detection threshold. suggesting that it operates withThe a lower detection threshold. thereby suggesting that it operates with a lower detection threshold.

Figure 9. 9. Full fill factor blanket i-Si photodiode array (Left) compared to pixel pattern photodiode Figure Full fill factor blanket i-Si photodiode array (Left) compared to pixel pattern photodiode array (Right). array (Right).

Figure 9. Full fill factor blanket i-Si photodiode array (Left) compared to pixel pattern photodiode

3.2.5. PIN Diode 3.2.5. DiodeFilm FilmCracking Cracking arrayPIN (Right).

The pixelated overall film filmstress stressofofthe theentire entiredevice. device. With The pixelatedPIN PINdiode diodestructure structure relieves relieves the the overall With thethe 3.2.5. PIN photodiode Diode Film Cracking blanket structure, have aa tendency tendencytotocrack crackand andpeel peelwhen when blanket photodiode structure,the the PIN PIN diode diode layers have thethe detector array is curled. Arrays with both the full fill factor blanket photodiode structure and detector array is curled. Arrays with both the factor blanket photodiode structure and thethe The pixelated PIN diode structure relieves the overall film stress of the entire device. With the pixelated PIN diode 3/8” stainless stainlesssteel steelpipe, pipe,asasshown shown Figure pixelated PIN diodestructure structurewere werecurled curled around around a 3/8” inin Figure 10.10. blanket photodiode structure, the PIN diode layers have a tendency to crack and peel when the

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3.2.5. PIN Diode Film Cracking The pixelated PIN diode structure relieves the overall film stress of the entire device. With the blanket photodiode structure, the PIN diode layers have a tendency to crack and peel when the detector array is curled. Arrays with both the full fill factor blanket photodiode structure and the pixelated PIN diode structure were curled around a 3/8” stainless steel pipe, as shown in Figure 10. Sensors 2016, 16, 1162 11 of 14

Figure 10. 10. Flexible Flexible photodiode photodiode array array wrapped wrapped around around aa 3/8” 3/8” stainless (left), microscope microscope Figure stainless steel steel pipe pipe (left), image of of pixelated pixelated PIN diode structure and full full fill fill factor factor PIN PIN diode diode structure structure (right) (right) after after image PIN diode structure (center), (center), and wrapping around 3/8” stainless pipe. wrapping around 3/8” stainless pipe.

Of the 24 arrays mechanically tested with the pixelated photodiode structure, none Of the 24 arrays mechanically tested with the pixelated photodiode structure, none demonstrated demonstrated any physical damage other than the embedding of particles from the pipe and manual any physical damage other than the embedding of particles from the pipe and manual handling of the handling of the arrays. Of the 24 arrays tested with the full fill factor PIN diode structure, 17 arrays. Of the 24 arrays tested with the full fill factor PIN diode structure, 17 demonstrated significant demonstrated significant cracking and flaking of the PIN diode layers, as shown in Figure 10. cracking and flaking of the PIN diode layers, as shown in Figure 10. 3.2.6. Effect of the the Substrate: Substrate: PEN 3.2.6. Effect of PEN vs. vs. Polyimide Polyimide Significant stress stress can can be be imparted imparted on on the the polyimide polyimide if if the the peel peel strength strength is is above above 80 80 g/inch, g/inch, Significant resulting in the elongation or stretching of the polyimide. The polyimide monomer formulation resulting in the elongation or stretching of the polyimide. The polyimide monomer formulation is is aa factor in the coefficient of thermal expansion for the final film. If the peel strength is too high or the factor in the coefficient of thermal expansion for the final film. If the peel strength is too high or the coefficient of ofthermal thermalexpansion expansionisissignificantly significantly different from films deposited, significant coefficient different from thethe thinthin films deposited, significant curl curl will be present in the debonded polyimide, rendering the flexible X-ray detector unusable. Using will be present in the debonded polyimide, rendering the flexible X-ray detector unusable. Using HD HD microsystems 2611 series polyimide with an appropriate adhesion promotor at the edge of the microsystems 2611 series polyimide with an appropriate adhesion promotor at the edge of the rigid rigid carrier substrate can ayield a flexible substrate is debonded easily debonded post process and does not carrier substrate can yield flexible substrate that is that easily post process and does not exhibit exhibit significant curl. The curl of the 2611 series polyimide is lower than PEN. A comparison of significant curl. The curl of the 2611 series polyimide is lower than PEN. A comparison of a debondeda debonded X-raya detector, debonded polyimide X-ray detector with strength, large peeland strength, and a PEN X-rayPEN detector, debondeda polyimide X-ray detector with large peel a debonded debonded polyimide X-ray detector with appropriate peel strength and minimal coefficient of polyimide X-ray detector with appropriate peel strength and minimal coefficient of thermal expansion thermal expansion mismatch is shown in Figure 11. mismatch is shown in Figure 11. Once the polyimide substrate is debonded, the user can be quite rough with the substrate and not be concerned with film cracking or peeling. One must be very cautious and slow while debonding the PEN, as perturbations during the debond process can cause the inorganic PIN diode layers to buckle under the sudden change in applied peeling force as the residual stress in the PEN is released. The maximum processing temperature of the TFT and PIN diode processing is 200 ˝ C, which is 20 ˝ C above the recommended continuous operation temperature, but 69 ˝ C below the melting temperature listed in Table 1. However, at 210 ˝ C and above, the PEN crystallizes, leading to significant shrinkage, and is prone to fracture during the debond process [23]. In this dynamic situation, even minor perturbations in the temperature of the TFT and PIN diode thin film deposition processes could

Figure 11. Curl comparison of low coefficient of thermal expansion (CTE) polyimide (Left), PEN (Middle), and high CTE polyimide (Right) debonded.

factor in the coefficient of thermal expansion for the final film. If the peel strength is too high or the coefficient of thermal expansion is significantly different from the thin films deposited, significant curl will be present in the debonded polyimide, rendering the flexible X-ray detector unusable. Using HD microsystems 2611 series polyimide with an appropriate adhesion promotor at the edge of the rigid carrier substrate can yield a flexible substrate that is easily debonded post process and does not Sensors 2016, 16, 1162 12 of 14 exhibit significant curl. The curl of the 2611 series polyimide is lower than PEN. A comparison of a debonded PEN X-ray detector, a debonded polyimide X-ray detector with large peel strength, and a significantly affect the X-ray structure of the with bonded PEN, potentially leading and to film buckling during the debonded polyimide detector appropriate peel strength minimal coefficient of debond process. thermal expansion mismatch is shown in Figure 11.

Figure 11. of of lowlow coefficient of thermal expansion (CTE)(CTE) polyimide (Left),(Left), PEN Figure 11. Curl Curlcomparison comparison coefficient of thermal expansion polyimide (Middle), and high CTE polyimide (Right) debonded. PEN (Middle), and high CTE polyimide (Right) debonded.

Once the polyimide substrate is debonded, the user can be quite rough with the substrate and In addition to the reduced curl and the improved film adhesion post debond, another advantage not be concerned with film cracking or peeling. One must be very cautious and slow while debonding of using polyimide over PEN is the significantly higher glass transition temperature of the polyimide the PEN, as perturbations during the debond process can cause the inorganic PIN diode layers to (360 ˝ C vs. 121 ˝ C, respectively). The higher glass transition temperature allows for a higher deposition buckle under the sudden change in applied peeling force as the residual stress in the PEN is released. temperature during the PECVD steps. The added degree of freedom allows for a higher quality finished product, as the higher deposition temperature can lead to a lower dark current, higher quantum efficiency, and higher fill factor for the PIN diode films. Simply increasing the deposition temperature of the PIN diode films from 200 ˝ C to 250 ˝ C, without making any other changes to the other deposition parameters, results in a significant increase in the quantum efficiency of the photodiodes at 520 nm from 57.8% to 61.8% when using a green LED light source with measured irradiance of 100 W/m2 . The increased deposition temperature of the PIN diode layers results in a denser, higher quality film that has fewer trap sites available to grab photogenerated electrons and holes before leaving the diode. 4. Conclusions The benefits of a pixelated PIN diode structure were evaluated in comparison to full fill factor diodes with respect to flexible X-ray detectors. In addition to demonstrating lower dark current that is more stable with time and having less cross-talk between pixels, the pixelated structure is more robust with respect to flexing and bending of the substrate. The pixelated structure does not require additional masks in comparison to the blanket diode structure, but enables the passivation of the diode, allowing for the mitigation of surface edge-related leakage and reduction of the overall dark current of the device. The biggest downside to the structure is the extra layout spacing necessary to place the PIN diode next to the TFT, as opposed to on top of the TFT. However, this layout concern is only an issue with flexible detectors that must have a resolution less than 83 dpi. Further benefits can be realized by utilizing polyimide as a substrate. HD Microsystems 2600 series polyimide has the right combination of low coefficient of thermal expansion and moderate adhesion strength to glass to enable a successful, low stress debond with minimal curl in the polyimide. In addition, the higher melting temperature of the polyimide allows for higher temperature PIN diode processing, leading to improved diode performance. Acknowledgments: The research was sponsored by the Army Research Laboratory (ARL) and was accomplished under Cooperative Agreement W911NG-04-2-005 and DTRA MIPRs 11-2161M and 11-2308M. The views and conclusions contained in this document are those of the authors and should not be interpreted as representing the official policies, either expressed or implied, of the ARL, DTRA, or the U.S. Government. The U.S. Government is authorized to reproduce and distribute reprints for government purposes, notwithstanding any copyright notation herein.

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Author Contributions: Marrs and Raupp collaborated on the writing of the paper, with both authors contributing significantly to the content. Raupp obtained the original funding for the work and helped interpret the experimental results. Marrs designed and processed the experiments associated with this work and interpreted the results. Conflicts of Interest: The authors declare no conflict of interest. The founding sponsors had no role in the design of the study; in the collection, analyses, or interpretation of data; in the writing of the manuscript, and in the decision to publish the results.

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