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J Micromech Microeng. Author manuscript; available in PMC 2016 April 11. Published in final edited form as: J Micromech Microeng. 2014 October ; 24(10): . doi:10.1088/0960-1317/24/10/107002.
Singulation for imaging ring arrays of capacitive micromachined ultrasonic transducers Chienliu Chang, Azadeh Moini, Amin Nikoozadeh, Ali Fatih Sarioglu, Nikhil Apte, Xuefeng Zhuang, and Butrus T Khuri-Yakub Edward L Ginzton Laboratory, Center for Nanoscale Science and Engineering, Stanford University, Stanford, CA 94305, USA
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Chienliu Chang: [email protected]
Abstract
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Singulation of MEMS is a critical step in the transition from wafer-level to die-level devices. As is the case for capacitive micromachined ultrasound transducer (CMUT) ring arrays, an ideal singulation must protect the fragile membranes from the processing environment while maintaining a ring array geometry. The singulation process presented in this paper involves bonding a trench-patterned CMUT wafer onto a support wafer, deep reactive ion etching (DRIE) of the trenches, separating the CMUT wafer from the support wafer and de-tethering the CMUT device from the CMUT wafer. The CMUT arrays fabricated and singulated in this process were ring-shaped arrays, with inner and outer diameters of 5 mm and 10 mm, respectively. The fabricated CMUT ring arrays demonstrate the ability of this method to successfully and safely singulate the ring arrays and is applicable to any arbitrary 2D shaped MEMS device with uspended microstructures, taking advantage of the inherent planar attributes of DRIE.
Keywords singulation; capacitive micromachined ultrasonic transducer (CMUT); ring arrays; deep reactive ion etching (DRIE); tether; ultrasound imaging; bonding
1. Introduction
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Recently, capacitive micromachined ultrasonic transducers (CMUTs) have been extensively developed for medical imaging and therapeutic applications [1, 2]. Compared to piezoelectric transducers, CMUTs are highly competitive in terms of both fabrication and performance [3, 4]. Because CMUTs are developed using silicon micromachining processes with sub-micron accuracy, they can be fabricated with arbitrary geometries, varying the device frequency and size for a broad range of applications. To achieve 3D images using forward-looking catheters or endoscopes in the use of intracardiac echocardiography (ICE) or transrectal detection of prostate cancer, the CMUT arrays should be ring-shaped [5, 6]. The ring-shaped ultrasound arrays allow the inclusion of a central endoscope lumen, through which therapeutic tools such as optical fibers for photoacoustic imaging or a high intensity focused ultrasound (HIFU) device for therapy can be accommodated [7]. Additionally, the sparse nature of a ring 2D array implies fewer elements than a fully populated 2D array of the same extent, resulting in a smaller number of required electrical interconnections,
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integrated circuits (ICs) and cables [8, 9]. In other words, the advantages of reducing the front-end complexity and improving data-acquisition speed by using ring-shaped arrays are highly desired in real-time ultrasonic 3D imaging [8–10].
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To acquire real-time 3D imaging using 2D CMUTs with a limited footprint, it is very important to integrate CMUTs with front-end ICs efficiently. We chose to integrate CMUTs and ICs based on multiple chip modules (MCMs) assembled through chip-to-chip bonding [11–13], allowing independent optimization of both CMUTs and ICs. Based on this approach, 2D CMUT imaging ring arrays with electrical through-wafer interconnects, which are called ‘vias’ later in the paper, are fabricated using surface micromachining techniques [8, 9, 11, 12]. Figure 1 illustrates the cross-section of a CMUT element on a silicon wafer prior to singulation. The resonant frequency of the CMUT is determined by the vibrating membrane of the cell. A CMUT element consisting of multiple cells electrically connected in parallel defines an effective single beam source in ultrasound imaging. Let us call the CMUT side the ‘front side’ of the wafer, and the other side, namely the side of the under bump metallization (UBM), the ‘backside’ of the wafer, as illustrated in figure 1. On the front side the CMUT membrane is made of silicon nitride deposited using low pressure chemical vapor deposition (LPCVD). In comparison to bulk piezoelectric transducers, CMUTs exhibit better performance in this application due to the low mechanical impedance of the membranes and thus better impedance-matching to fluid. Electrical through-wafer interconnects (vias) allow for individual electrical contact to the CMUT elements. In our case we leave the top electrode commonly connected for all elements of the ring arrays and make a single element addressable with a through-wafer via connected to its polysilicon bottom electrodes. The aluminum layer is deposited on the backside polysilicon layer to reduce wiring resistances. The backside electrical contacts are further processed with a UBM stack of Au/Ni/Ti in preparation for solder bumping, used in chip-to-chip bonding with interposers or ICs (not shown in figure 1 [11–13]). The fabrication process for the CMUT is explained in detail in our previous papers [11, 12, 14]. Table 1 lists the key physical dimensions for the CMUT devices described in this paper. Our forward-looking CMUT ring array, which consists of 512 elements in total, delivers real-time 3D ultrasound imaging and thus can be regarded as a ‘very large scale’ ultrasound imaging system [9, 22, 23]. As shown in figure 2, a CMUT ring array has over 10 000 suspended membranes and functional microstructures including CMUTs and UBMs on both sides of the wafer connected by 640 vertical electrical through-wafer vias. The large number of highly dense microstructures with varying heights on both sides of the wafer makes photoresist coating difficult, especially for the areas adjacent to the through-wafer vias. Furthermore, since 40 CMUT arrays were fabricated on the same 4 in. Si wafer, the wafer with total few tens of thousands of through-wafer vias became relatively fragile for manual handling prior to singulation. In microfabrication processes, singulation is an indispensable process used for preparing individual dies for final packaging. For semiconductor wafers, the singulation process is commonly carried out using a dicing saw. Because the dicing saw can only cut along straight lines, it cannot be applied to any devices with curved boundaries, such as a ring-shaped CMUT array. Laser dicing seems to be a viable alternative to a dicing saw for singulating MEMS devices with arbitrary shapes [15]. However, this process is both expensive and time-consuming in terms of throughput. For efficient singulation of devices
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with arbitrary geometries, it is possible to obtain accurate alignment features by leveraging existing lithography-defined features and using deep reactive ion etching (DRIE). DRIE, commonly used in microfabrication processes, is a promising candidate to meet the requirement of high throughput and accurate pattern definition for singulation [16, 19, 26, 27]. To avoid the singulated CMUT chips unintentionally detaching during processes a detethering technique which the tethers are formed simultaneously with DRIE is employed [17, 24, 25]. Compared to previous singulation (or release) techniques where the functional structures or devices were only defined on one side of the wafer, the functional microstructures on both sides of the CMUT wafer have been taken into consideration in the singulation in terms of fabrication and device functionalities. In this paper a DRIE process using a Surface Technology Systems (STS) instrument based on the Bosch process is employed for the singulation of the CMUT ring arrays on a 4 in. wafer and challenges in using this technique are addressed. The demand and the issues of using a support wafer in DRIE with an adhesive photoresist are also discussed. Finally, the functionality of the singulated CMUT ring arrays demonstrates that this method is applicable to singulating any MEMS device with any 2D shapes and suspended microstructures.
2. Singulation process
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The CMUT ring arrays were designed and fabricated pursuant to the typical surface micromachining of CMUTs with through-wafer vias [11, 12, 14]. After forming the UBM stacks, trenches were patterned outside the CMUT ring arrays and dry etched to expose the silicon substrate in preparation for the subsequent DRIE singulation, as shown in figure 2. The outer and inner etched trenches on the front side have the same width of 110 μm. It can be seen that the outer trench features a tether patterned with a stepwise shrinking width of trench along the direction. Due to the aspect ratio dependent etching (ARDE) of the RIE, the tether pattern will generate a notched tether between the ring arrays and the silicon substrate after etching [16–18]. The ARDE effect means that etching depth is dependent on etching width, i.e. the narrower the width is to etch, the shallower the trench will be, as compared to wider trenches. In our case the minimum trench width and length of the tether pattern were 10 μm and 40 μm, respectively (see figure 2(b)). We designed only one tether for each CMUT array and found that in most cases even one tether was strong enough to maintain the connection between the ring array and the wafer during the singulation process.
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In STS DRIE, helium is used to cool the backside of the etching wafer to control etch selectivity and uniformity. However, contact must be maintained between the wafer and the chuck to prevent helium leakage into the chamber in a through-wafer etching process. Here we propose bonding the process wafer to a support wafer to maintain a gas-tight seal during STS DRIE without adding additional processing steps that would likely alter the mechanical characteristics of the CMUT arrays [19]. In order to prevent damage to the CMUT membranes due to DRIE deviations from vertical sidewalls during etching, it is desirable to etch the wafer from the front side, maintaining accurate dimensions for the arrays and protecting the suspended membranes. Figure 3 depicts the fabrication for the singulation of a CMUT ring array with a simplified cross-section. First, a photoresist layer was coated on the front side of the wafer (10 μm
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SPR220-7, Shipley). The singulation pattern was exposed in the resist and the patterned photoresist was hard baked in a 110 °C oven for 1 h (see figure 3(b)). In addition, a support wafer was coated with an unbaked photoresist (3 μm SPR220-3, Shipley), and the process wafer was manually aligned and attached to the support wafer. The bonded wafers were then hard baked on a 110 °C hotplate for 15 min to prevent detachment in the subsequent DRIE etching chamber. A 1 kg weight was placed on the bonded wafers to provide uniform pressure and prevent any voids during baking (see figure 3(c)).
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After baking, the bonded wafers were etched in an STS DRIE instrument with the etching conditions listed in table 2 (see figure 3(d)). The etch rate varies depending on the percentage of exposed silicon on the wafer and feature sizes of the exposed areas. As listed in table 2, to passivate the sidewall during the long through-wafer etching, octafluorocyclobutane (C4F8) was excessively supplied in the passivation cycle. Compared to commonly-used DRIE recipes, the platen RF power shown in table 2 in the etching cycle was also relatively high, providing higher energy for the plasma ion to go deeper and remove the passivation on the bottom of the trenches until etching through the wafer. After DRIE, the bonded wafers were released in an acetone bath. Finally the CMUT arrays were released from the substrate by manually applying force on the tether (see figure 3(e)) [17, 20]. Figure 4 shows the singulated CMUT chip released from the substrate after breaking the tether. The tether, measured to be around 200 μm ~ 220 μm thick, exhibited sufficient stiffness to support the whole CMUT device until manual breakage (see figure 4(c)).
3. Results and discussion
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The singulated ring device was characterized with RF microprobes (DCP-150R or DCP-100, Cascade Microtech Inc.) as shown in figure 5(a). The RF probes were brought into contact with the UBM pads of a CMUT element on the backside of the substrate as shown in figure 5(b). The corresponding CMUT element of the second inner ring (Ring 2) on the front side of the substrate electrically connected with these UBM pads through the through-wafer vias is shown in the dashed-line box of figure 4(d).
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The input electrical impedance (Network analyzer 4294 A, Agilent Technologies) for the CMUT elements in air was measured to verify device characteristics such as the resonant frequencies of the elements. For the electrical input impedance measurements, DC bias voltages (DC high-voltage power supply PS 310/1250 V, Stanford Research Systems Inc.) close to the pull-in point were applied, and an ac voltage was applied at 50 mVrms simultaneously for checking resonance in air. Figure 6 presents the amplitudes and the phases of the measured input impedance for a single element of Ring 2 with the specifications listed in table 1. As shown in figure 6, as the applied dc bias voltage increases, the fundamental resonant frequency of the CMUT element decreases due to the spring softening effect, while the magnitude of the electrical impedance, proportional to the mechanical response, increases. Post-singulation characterizations showed that no element was damaged during the singulation process. Furthermore, the input impedance measurement demonstrated that all singulated devices functioned as expected with a yield higher than 98%.
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The three main prerequisites for successful singulation by this method are as follows.
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1.
The photoresist DRIE mask must be durable and removable after DRIE.
2.
The adhesive photoresist layer between the CMUT wafer and the support wafer must be void-free and maintain its adhesive nature during the DRIE.
3.
The tether must hold the CMUT device chip during the entire process until manual breakage.
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As for prerequisite (1), as compared to directly etching a silicon wafer, the use of a support wafer during DRIE reduces the thermal conductance between the process wafer and the chuck. Consequently, the cooling effect of helium and thus the etching selectivity of silicon to the photoresist mask decrease, making a thicker mask desirable. However, a thick photoresist mask could lead to burning, damaging the devices. To circumvent the troublesome issues associated with using a thick photoresist, one may think to divide the through-wafer DRIE into two shorter DRIEs, one on each side of the wafer. It means that the thin photoresist layers are employed as the etching masks on each side of the wafer for DRIE, simplifying the lithography and DRIE processes. To prove the feasibility of these two shorter DRIEs, we first tried etching trenches halfway through the substrate on the backside using a thin photoresist mask without a support wafer. Following this first shorter DRIE, the front-side of the wafer was patterned with trenches aligned to the corresponding backside trenches and then attached to a support wafer to continue the remaining second DRIE from the front side. However, these wafers did not survive the second shorter DRIE, breaking in the load-lock of the DRIE equipment. The possible cause of the wafer breakage was ascribed to the atmospheric air encapsulated between the backside etched trenches and the support wafer, as well as wafer fragility. Based on our experiments above, a single DRIE on one side of the wafer for device singulation is inevitable and thus a photoresist mask of appropriate thickness must be selected. Regarding prerequisite (2), the time for completely dissolving the adhesive photoresist following the DRIE strongly depends on the distribution and area density of the throughwafer trenches. As an alternative to the adhesive photoresist, a transparent adhesive called Crystalbond (Crystalbond 509, SPI Supplies) also can be used to temporarily bond the two wafers [16]. While Crystalbond has favorable thermal conductivity suitable for DRIE, it is necessary to grind it to a powder beforehand and dissolve it in acetone to prepare the material for bonding; processing that is often not desirable in a clean facility. Compared to Crystalbond, the use of photoresist as an adhesive between the process and support wafers is readily compatible for subsequent clean processes and analysis.
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As for prerequisite (3), the structure and dimensions of the tether can be further optimized. The tether was designed along the direction for ease of silicon crystal cleavage. The tether was chosen to be placed outside of the ring to avoid a broken tether inside, possibly remaining as an obstacle for accommodating the therapeutic tools in the central lumen of the forward-looking ultrasound endoscope in the future. For the same reason of minimizing the size of the final broken tether, the trench for forming the tether was patterned near the edge of the CMUT ring arrays (see figure 2(b)). As shown in figure 2(b), the minimum width and length of the gap for forming the tether were 10 μm and 40 μm, respectively, and few devices J Micromech Microeng. Author manuscript; available in PMC 2016 April 11.
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were found to prematurely detach from the wafer during the final steps of singulation (see figure 3(e)). Therefore, increasing the minimum length or decreasing the minimum width of the gap can produce a stronger tether to hold all devices on the wafer during singulation. It should be noted, however, that using a bigger tether or multiple tethers on a single device may result in a large breakage area on the individual dies upon application of mechanical force, possibly damaging the CMUT arrays. Finally, square 32 × 32 CMUT imaging arrays were also fabricated and singulated on the same wafer (see figure 4(a)), demonstrating that this method is applicable to any arbitrary 2D shaped MEMS device with suspended micro-structures like vibrating membranes. We have successfully demonstrated volumetric ultrasound imaging using these singulated CMUT arrays [9, 21].
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4. Conclusion A reliable singulation method utilizing DRIE has been presented that addresses the need for singulation of CMUT ring arrays. The surface-micromachined CMUT ring arrays with electrical through-wafer vias exhibit full functionality after singulation. The singulation method is not only suitable for CMUT ring arrays, but also applicable to any MEMS device with arbitrary 2D geometries and suspended microstructures.
Acknowledgments The CMUT devices were fabricated in the Stanford Nano-fabrication Facility (SNF) at the Center for Integrated Systems (CIS) of Stanford University and the UCSB Nano-fabrication Facility at the University of California at Santa Barbara. The authors would like to thank the staff at both facilities and the Ginzton Laboratory of Stanford University, Stanford, CA.
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References
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1. Khuri-Yakub BT, Oralkan O. Capacitive micromachined ultrasonic transducers for medical imaging and therapy. J Micromech Microeng. 2011; 21:054004. 2. Khuri-Yakub BT, Oralkan O, Kupnik M. Next-gen ultrasound. IEEE Spectr. 2009; 46:44–54. 3. Legros, M.; Meynier, C.; Dufait, R.; Ferin, G.; Tranquart, F. Piezocomposite and CMUT arrays assessment through in vitro imaging performances. Proc. IEEE Int. Ultrasonics Symp; Beijing. Nov. 2008; 2008. p. 1142-5. 4. Savoia AS, Caliano G, Pappalardo M. A CMUT probe for medical ultrasonography: from microfabrication to system integration. IEEE Trans Ultrason Ferroelect Freq Control. 2012; 59:1127–38. 5. Demirci U, Ergun AS, Oralkan O, Karaman M, Khuri-Yakub BT. Forward-viewing CMUT arrays for medical imaging. IEEE Trans Ultrason Ferroelect Freq Control. 2004; 51:887–95. 6. Culjat, MO.; Dann, AE.; Lee, M.; Bennett, DB.; Schulam, PG.; Lee, H.; Grundfest, WS.; Singh, RS. Transurethral ultrasound catheter-based transducer with flexible polyimide joints. Proc. IEEE Int. Ultrasonics Symp; Roma. Sept. 2009; 2009. p. 2209-12. 7. Stephen DN, et al. Multifunctional catheters combining intracardiac ultrasound imaging and electrophysiology sensing. IEEE Trans Ultrason Ferroelect Freq Control. 2008; 55:1570–81. 8. Nikoozadeh, A., et al. Forward-looking intracardiac imaging catheters using fully integrated CMUT arrays. Proc. IEEE Int. Ultrasonics Symp; San Diego. Oct. 2010; 2010. p. 770-3. 9. Nikoozadeh, A.; Chang, C.; Choe, JW.; Bhuyan, A.; Lee, BC.; Moini, A.; Khuri-Yakub, BT. An integrated ring CMUT array for endoscopic ultrasound and photoacoustic imaging. Proc. IEEE Int. Ultrasonics Symp; Prague. Jul. 2013; 2013. p. IUS1-G3-2
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Author Manuscript Author Manuscript Figure 1.
The cross-section of a CMUT element prior to singulation. (Only two cells corresponding to two cavities for the element are shown in the figure.)
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Figure 2.
Micrographs of the etched trenches for the CMUT singulation: (a) front side (CMUT side) and (c) back side (UBM side) of the wafer. (b) and (d) Magnifications of (a) and (c) near the outer etched trenches. The blue dashed box in (b) shows one element of the outmost ring (Ring 4) in the four CMUT ring arrays. The element consists of 5 × 4 circular cells. (A = 10 μm, B = 40 μm, C = 110 μm, D = 180 μm, the inner diameter of the ring device Di = 5 mm, and the outer diameter of the ring device Do = 10 mm.)
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Author Manuscript Author Manuscript Author Manuscript Figure 3.
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Fabrication of CMUT singulation: (a) etching trenches; (b) thick PR patterning; (c) attaching the CMUT wafer to a support wafer coated with unbaked PR (adhesive) and baking the bonded wafers on a hot plate; (d) DRIE and tether formation; (e) removing PR and then releasing the CMUT device from the wafer by breaking the tether (de-tethering).
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Author Manuscript Author Manuscript Figure 4.
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Singulated CMUT chip (front side of the wafer): (a) soaking the wafer in acetone to remove PR; (b) the right portion of the singulated CMUT ring array; (c) magnification of the broken tether near the edge of the device; and (d) magnification of Ring 2 and Ring 3, where the dashed box indicates one element of Ring 2. (c) and (d) Magnifications of the right and left dashed boxes shown in (b).
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Author Manuscript Author Manuscript Figure 5.
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Measurement of input impedance with RF probing on the backside of the CMUT ring arrays: (a) experimental setup and (b) magnification of the RF probes contacting the UBM pads.
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Figure 6.
Input impedance of a CMUT element of the second ring (Ring 2) arrays: (a) amplitude and (b) phase.
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Table 1
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Physical dimensions of the CMUT imaging ring arrays (Ring 2). Values (unit: μm)
Parameters Thickness of wafer
400
Radius of membrane for a CMUT cell
16
Thickness of membrane
0.7
Gap height in the cavity
0.2
Thickness of insulation layer
0.15
Radius of top electrode
15
Thickness of top electrode
0.3
Radius of through-wafer via
25
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Thickness of poly-Si bottom electrode
0.95
Thickness of thermal oxide layer
1.0
Thickness of LTO layer
0.28
Thickness of backside Al layer
0.3
Thickness of UBM layers (Au/ Ni/ Ti)
0.15/ 0.25/ 0.01
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Table 2
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The DRIE conditions for etching trenches by using STS etcher. Parameters
a
Values
Cycle step
Etching
Passivation
Gas flowrate (sccm)
SF6: 130
C4F8: 85
Active time (s)
12
7
Overlap (s)
1
0.5
Pressure (mtorr)
33
18~19
APCa
70%
70%
Coil RF power (W)
600
600
Platen RF power (W)
120
0
APC = auto pressure control
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J Micromech Microeng. Author manuscript; available in PMC 2016 April 11. Published in final edited form as: J Micromech Microeng. 2014 October ; 24(10): . doi:10.1088/0960-1317/24/10/107002.
Singulation for imaging ring arrays of capacitive micromachined ultrasonic transducers Chienliu Chang, Azadeh Moini, Amin Nikoozadeh, Ali Fatih Sarioglu, Nikhil Apte, Xuefeng Zhuang, and Butrus T Khuri-Yakub Edward L Ginzton Laboratory, Center for Nanoscale Science and Engineering, Stanford University, Stanford, CA 94305, USA
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Chienliu Chang: [email protected]
Abstract
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Singulation of MEMS is a critical step in the transition from wafer-level to die-level devices. As is the case for capacitive micromachined ultrasound transducer (CMUT) ring arrays, an ideal singulation must protect the fragile membranes from the processing environment while maintaining a ring array geometry. The singulation process presented in this paper involves bonding a trench-patterned CMUT wafer onto a support wafer, deep reactive ion etching (DRIE) of the trenches, separating the CMUT wafer from the support wafer and de-tethering the CMUT device from the CMUT wafer. The CMUT arrays fabricated and singulated in this process were ring-shaped arrays, with inner and outer diameters of 5 mm and 10 mm, respectively. The fabricated CMUT ring arrays demonstrate the ability of this method to successfully and safely singulate the ring arrays and is applicable to any arbitrary 2D shaped MEMS device with uspended microstructures, taking advantage of the inherent planar attributes of DRIE.
Keywords singulation; capacitive micromachined ultrasonic transducer (CMUT); ring arrays; deep reactive ion etching (DRIE); tether; ultrasound imaging; bonding
1. Introduction
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Recently, capacitive micromachined ultrasonic transducers (CMUTs) have been extensively developed for medical imaging and therapeutic applications [1, 2]. Compared to piezoelectric transducers, CMUTs are highly competitive in terms of both fabrication and performance [3, 4]. Because CMUTs are developed using silicon micromachining processes with sub-micron accuracy, they can be fabricated with arbitrary geometries, varying the device frequency and size for a broad range of applications. To achieve 3D images using forward-looking catheters or endoscopes in the use of intracardiac echocardiography (ICE) or transrectal detection of prostate cancer, the CMUT arrays should be ring-shaped [5, 6]. The ring-shaped ultrasound arrays allow the inclusion of a central endoscope lumen, through which therapeutic tools such as optical fibers for photoacoustic imaging or a high intensity focused ultrasound (HIFU) device for therapy can be accommodated [7]. Additionally, the sparse nature of a ring 2D array implies fewer elements than a fully populated 2D array of the same extent, resulting in a smaller number of required electrical interconnections,
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integrated circuits (ICs) and cables [8, 9]. In other words, the advantages of reducing the front-end complexity and improving data-acquisition speed by using ring-shaped arrays are highly desired in real-time ultrasonic 3D imaging [8–10].
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To acquire real-time 3D imaging using 2D CMUTs with a limited footprint, it is very important to integrate CMUTs with front-end ICs efficiently. We chose to integrate CMUTs and ICs based on multiple chip modules (MCMs) assembled through chip-to-chip bonding [11–13], allowing independent optimization of both CMUTs and ICs. Based on this approach, 2D CMUT imaging ring arrays with electrical through-wafer interconnects, which are called ‘vias’ later in the paper, are fabricated using surface micromachining techniques [8, 9, 11, 12]. Figure 1 illustrates the cross-section of a CMUT element on a silicon wafer prior to singulation. The resonant frequency of the CMUT is determined by the vibrating membrane of the cell. A CMUT element consisting of multiple cells electrically connected in parallel defines an effective single beam source in ultrasound imaging. Let us call the CMUT side the ‘front side’ of the wafer, and the other side, namely the side of the under bump metallization (UBM), the ‘backside’ of the wafer, as illustrated in figure 1. On the front side the CMUT membrane is made of silicon nitride deposited using low pressure chemical vapor deposition (LPCVD). In comparison to bulk piezoelectric transducers, CMUTs exhibit better performance in this application due to the low mechanical impedance of the membranes and thus better impedance-matching to fluid. Electrical through-wafer interconnects (vias) allow for individual electrical contact to the CMUT elements. In our case we leave the top electrode commonly connected for all elements of the ring arrays and make a single element addressable with a through-wafer via connected to its polysilicon bottom electrodes. The aluminum layer is deposited on the backside polysilicon layer to reduce wiring resistances. The backside electrical contacts are further processed with a UBM stack of Au/Ni/Ti in preparation for solder bumping, used in chip-to-chip bonding with interposers or ICs (not shown in figure 1 [11–13]). The fabrication process for the CMUT is explained in detail in our previous papers [11, 12, 14]. Table 1 lists the key physical dimensions for the CMUT devices described in this paper. Our forward-looking CMUT ring array, which consists of 512 elements in total, delivers real-time 3D ultrasound imaging and thus can be regarded as a ‘very large scale’ ultrasound imaging system [9, 22, 23]. As shown in figure 2, a CMUT ring array has over 10 000 suspended membranes and functional microstructures including CMUTs and UBMs on both sides of the wafer connected by 640 vertical electrical through-wafer vias. The large number of highly dense microstructures with varying heights on both sides of the wafer makes photoresist coating difficult, especially for the areas adjacent to the through-wafer vias. Furthermore, since 40 CMUT arrays were fabricated on the same 4 in. Si wafer, the wafer with total few tens of thousands of through-wafer vias became relatively fragile for manual handling prior to singulation. In microfabrication processes, singulation is an indispensable process used for preparing individual dies for final packaging. For semiconductor wafers, the singulation process is commonly carried out using a dicing saw. Because the dicing saw can only cut along straight lines, it cannot be applied to any devices with curved boundaries, such as a ring-shaped CMUT array. Laser dicing seems to be a viable alternative to a dicing saw for singulating MEMS devices with arbitrary shapes [15]. However, this process is both expensive and time-consuming in terms of throughput. For efficient singulation of devices
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with arbitrary geometries, it is possible to obtain accurate alignment features by leveraging existing lithography-defined features and using deep reactive ion etching (DRIE). DRIE, commonly used in microfabrication processes, is a promising candidate to meet the requirement of high throughput and accurate pattern definition for singulation [16, 19, 26, 27]. To avoid the singulated CMUT chips unintentionally detaching during processes a detethering technique which the tethers are formed simultaneously with DRIE is employed [17, 24, 25]. Compared to previous singulation (or release) techniques where the functional structures or devices were only defined on one side of the wafer, the functional microstructures on both sides of the CMUT wafer have been taken into consideration in the singulation in terms of fabrication and device functionalities. In this paper a DRIE process using a Surface Technology Systems (STS) instrument based on the Bosch process is employed for the singulation of the CMUT ring arrays on a 4 in. wafer and challenges in using this technique are addressed. The demand and the issues of using a support wafer in DRIE with an adhesive photoresist are also discussed. Finally, the functionality of the singulated CMUT ring arrays demonstrates that this method is applicable to singulating any MEMS device with any 2D shapes and suspended microstructures.
2. Singulation process
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The CMUT ring arrays were designed and fabricated pursuant to the typical surface micromachining of CMUTs with through-wafer vias [11, 12, 14]. After forming the UBM stacks, trenches were patterned outside the CMUT ring arrays and dry etched to expose the silicon substrate in preparation for the subsequent DRIE singulation, as shown in figure 2. The outer and inner etched trenches on the front side have the same width of 110 μm. It can be seen that the outer trench features a tether patterned with a stepwise shrinking width of trench along the direction. Due to the aspect ratio dependent etching (ARDE) of the RIE, the tether pattern will generate a notched tether between the ring arrays and the silicon substrate after etching [16–18]. The ARDE effect means that etching depth is dependent on etching width, i.e. the narrower the width is to etch, the shallower the trench will be, as compared to wider trenches. In our case the minimum trench width and length of the tether pattern were 10 μm and 40 μm, respectively (see figure 2(b)). We designed only one tether for each CMUT array and found that in most cases even one tether was strong enough to maintain the connection between the ring array and the wafer during the singulation process.
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In STS DRIE, helium is used to cool the backside of the etching wafer to control etch selectivity and uniformity. However, contact must be maintained between the wafer and the chuck to prevent helium leakage into the chamber in a through-wafer etching process. Here we propose bonding the process wafer to a support wafer to maintain a gas-tight seal during STS DRIE without adding additional processing steps that would likely alter the mechanical characteristics of the CMUT arrays [19]. In order to prevent damage to the CMUT membranes due to DRIE deviations from vertical sidewalls during etching, it is desirable to etch the wafer from the front side, maintaining accurate dimensions for the arrays and protecting the suspended membranes. Figure 3 depicts the fabrication for the singulation of a CMUT ring array with a simplified cross-section. First, a photoresist layer was coated on the front side of the wafer (10 μm
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SPR220-7, Shipley). The singulation pattern was exposed in the resist and the patterned photoresist was hard baked in a 110 °C oven for 1 h (see figure 3(b)). In addition, a support wafer was coated with an unbaked photoresist (3 μm SPR220-3, Shipley), and the process wafer was manually aligned and attached to the support wafer. The bonded wafers were then hard baked on a 110 °C hotplate for 15 min to prevent detachment in the subsequent DRIE etching chamber. A 1 kg weight was placed on the bonded wafers to provide uniform pressure and prevent any voids during baking (see figure 3(c)).
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After baking, the bonded wafers were etched in an STS DRIE instrument with the etching conditions listed in table 2 (see figure 3(d)). The etch rate varies depending on the percentage of exposed silicon on the wafer and feature sizes of the exposed areas. As listed in table 2, to passivate the sidewall during the long through-wafer etching, octafluorocyclobutane (C4F8) was excessively supplied in the passivation cycle. Compared to commonly-used DRIE recipes, the platen RF power shown in table 2 in the etching cycle was also relatively high, providing higher energy for the plasma ion to go deeper and remove the passivation on the bottom of the trenches until etching through the wafer. After DRIE, the bonded wafers were released in an acetone bath. Finally the CMUT arrays were released from the substrate by manually applying force on the tether (see figure 3(e)) [17, 20]. Figure 4 shows the singulated CMUT chip released from the substrate after breaking the tether. The tether, measured to be around 200 μm ~ 220 μm thick, exhibited sufficient stiffness to support the whole CMUT device until manual breakage (see figure 4(c)).
3. Results and discussion
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The singulated ring device was characterized with RF microprobes (DCP-150R or DCP-100, Cascade Microtech Inc.) as shown in figure 5(a). The RF probes were brought into contact with the UBM pads of a CMUT element on the backside of the substrate as shown in figure 5(b). The corresponding CMUT element of the second inner ring (Ring 2) on the front side of the substrate electrically connected with these UBM pads through the through-wafer vias is shown in the dashed-line box of figure 4(d).
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The input electrical impedance (Network analyzer 4294 A, Agilent Technologies) for the CMUT elements in air was measured to verify device characteristics such as the resonant frequencies of the elements. For the electrical input impedance measurements, DC bias voltages (DC high-voltage power supply PS 310/1250 V, Stanford Research Systems Inc.) close to the pull-in point were applied, and an ac voltage was applied at 50 mVrms simultaneously for checking resonance in air. Figure 6 presents the amplitudes and the phases of the measured input impedance for a single element of Ring 2 with the specifications listed in table 1. As shown in figure 6, as the applied dc bias voltage increases, the fundamental resonant frequency of the CMUT element decreases due to the spring softening effect, while the magnitude of the electrical impedance, proportional to the mechanical response, increases. Post-singulation characterizations showed that no element was damaged during the singulation process. Furthermore, the input impedance measurement demonstrated that all singulated devices functioned as expected with a yield higher than 98%.
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The three main prerequisites for successful singulation by this method are as follows.
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1.
The photoresist DRIE mask must be durable and removable after DRIE.
2.
The adhesive photoresist layer between the CMUT wafer and the support wafer must be void-free and maintain its adhesive nature during the DRIE.
3.
The tether must hold the CMUT device chip during the entire process until manual breakage.
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As for prerequisite (1), as compared to directly etching a silicon wafer, the use of a support wafer during DRIE reduces the thermal conductance between the process wafer and the chuck. Consequently, the cooling effect of helium and thus the etching selectivity of silicon to the photoresist mask decrease, making a thicker mask desirable. However, a thick photoresist mask could lead to burning, damaging the devices. To circumvent the troublesome issues associated with using a thick photoresist, one may think to divide the through-wafer DRIE into two shorter DRIEs, one on each side of the wafer. It means that the thin photoresist layers are employed as the etching masks on each side of the wafer for DRIE, simplifying the lithography and DRIE processes. To prove the feasibility of these two shorter DRIEs, we first tried etching trenches halfway through the substrate on the backside using a thin photoresist mask without a support wafer. Following this first shorter DRIE, the front-side of the wafer was patterned with trenches aligned to the corresponding backside trenches and then attached to a support wafer to continue the remaining second DRIE from the front side. However, these wafers did not survive the second shorter DRIE, breaking in the load-lock of the DRIE equipment. The possible cause of the wafer breakage was ascribed to the atmospheric air encapsulated between the backside etched trenches and the support wafer, as well as wafer fragility. Based on our experiments above, a single DRIE on one side of the wafer for device singulation is inevitable and thus a photoresist mask of appropriate thickness must be selected. Regarding prerequisite (2), the time for completely dissolving the adhesive photoresist following the DRIE strongly depends on the distribution and area density of the throughwafer trenches. As an alternative to the adhesive photoresist, a transparent adhesive called Crystalbond (Crystalbond 509, SPI Supplies) also can be used to temporarily bond the two wafers [16]. While Crystalbond has favorable thermal conductivity suitable for DRIE, it is necessary to grind it to a powder beforehand and dissolve it in acetone to prepare the material for bonding; processing that is often not desirable in a clean facility. Compared to Crystalbond, the use of photoresist as an adhesive between the process and support wafers is readily compatible for subsequent clean processes and analysis.
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As for prerequisite (3), the structure and dimensions of the tether can be further optimized. The tether was designed along the direction for ease of silicon crystal cleavage. The tether was chosen to be placed outside of the ring to avoid a broken tether inside, possibly remaining as an obstacle for accommodating the therapeutic tools in the central lumen of the forward-looking ultrasound endoscope in the future. For the same reason of minimizing the size of the final broken tether, the trench for forming the tether was patterned near the edge of the CMUT ring arrays (see figure 2(b)). As shown in figure 2(b), the minimum width and length of the gap for forming the tether were 10 μm and 40 μm, respectively, and few devices J Micromech Microeng. Author manuscript; available in PMC 2016 April 11.
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were found to prematurely detach from the wafer during the final steps of singulation (see figure 3(e)). Therefore, increasing the minimum length or decreasing the minimum width of the gap can produce a stronger tether to hold all devices on the wafer during singulation. It should be noted, however, that using a bigger tether or multiple tethers on a single device may result in a large breakage area on the individual dies upon application of mechanical force, possibly damaging the CMUT arrays. Finally, square 32 × 32 CMUT imaging arrays were also fabricated and singulated on the same wafer (see figure 4(a)), demonstrating that this method is applicable to any arbitrary 2D shaped MEMS device with suspended micro-structures like vibrating membranes. We have successfully demonstrated volumetric ultrasound imaging using these singulated CMUT arrays [9, 21].
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4. Conclusion A reliable singulation method utilizing DRIE has been presented that addresses the need for singulation of CMUT ring arrays. The surface-micromachined CMUT ring arrays with electrical through-wafer vias exhibit full functionality after singulation. The singulation method is not only suitable for CMUT ring arrays, but also applicable to any MEMS device with arbitrary 2D geometries and suspended microstructures.
Acknowledgments The CMUT devices were fabricated in the Stanford Nano-fabrication Facility (SNF) at the Center for Integrated Systems (CIS) of Stanford University and the UCSB Nano-fabrication Facility at the University of California at Santa Barbara. The authors would like to thank the staff at both facilities and the Ginzton Laboratory of Stanford University, Stanford, CA.
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References
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1. Khuri-Yakub BT, Oralkan O. Capacitive micromachined ultrasonic transducers for medical imaging and therapy. J Micromech Microeng. 2011; 21:054004. 2. Khuri-Yakub BT, Oralkan O, Kupnik M. Next-gen ultrasound. IEEE Spectr. 2009; 46:44–54. 3. Legros, M.; Meynier, C.; Dufait, R.; Ferin, G.; Tranquart, F. Piezocomposite and CMUT arrays assessment through in vitro imaging performances. Proc. IEEE Int. Ultrasonics Symp; Beijing. Nov. 2008; 2008. p. 1142-5. 4. Savoia AS, Caliano G, Pappalardo M. A CMUT probe for medical ultrasonography: from microfabrication to system integration. IEEE Trans Ultrason Ferroelect Freq Control. 2012; 59:1127–38. 5. Demirci U, Ergun AS, Oralkan O, Karaman M, Khuri-Yakub BT. Forward-viewing CMUT arrays for medical imaging. IEEE Trans Ultrason Ferroelect Freq Control. 2004; 51:887–95. 6. Culjat, MO.; Dann, AE.; Lee, M.; Bennett, DB.; Schulam, PG.; Lee, H.; Grundfest, WS.; Singh, RS. Transurethral ultrasound catheter-based transducer with flexible polyimide joints. Proc. IEEE Int. Ultrasonics Symp; Roma. Sept. 2009; 2009. p. 2209-12. 7. Stephen DN, et al. Multifunctional catheters combining intracardiac ultrasound imaging and electrophysiology sensing. IEEE Trans Ultrason Ferroelect Freq Control. 2008; 55:1570–81. 8. Nikoozadeh, A., et al. Forward-looking intracardiac imaging catheters using fully integrated CMUT arrays. Proc. IEEE Int. Ultrasonics Symp; San Diego. Oct. 2010; 2010. p. 770-3. 9. Nikoozadeh, A.; Chang, C.; Choe, JW.; Bhuyan, A.; Lee, BC.; Moini, A.; Khuri-Yakub, BT. An integrated ring CMUT array for endoscopic ultrasound and photoacoustic imaging. Proc. IEEE Int. Ultrasonics Symp; Prague. Jul. 2013; 2013. p. IUS1-G3-2
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10. Karaman M, Wygant IO, Oralkan O, Khuri-Yakub BT. Minimally redundant 2-D array designs for 3D medical ultrasound imaging. IEEE Trans Med Imag. 2009; 28:1051–61. 11. Wygant IO, Zhuang X, Yeh DT, Oralkan O, Ergun AS, Karaman M, Khuri-Yakub BT. Integration of 2D CMUT arrays with front-end electronics for volumetric ultrasound imaging. IEEE Trans Ultrason Ferroelect Freq Control. 2008; 55:327–42. 12. Oralkan O, Ergun AS, Cheng CH, Johnson JA, Karaman M, Lee TH, Khuri-Yakub BT. Volumetric ultrasound imaging using 2D CMUT arrays. IEEE Trans Ultrason Ferroelect Freq Control. 2003; 50:1581–94. 13. Lin DS, et al. Packaging and modular assembly of large area and fin-pitch 2D ultrasonic transducer arrays. IEEE Trans Ultrason Ferroelect Freq Control. 2013; 60:1356–75. 14. Ergun AS, Huang Y, Zhuang X, Oralkan O, Yaralioglu GG, Khuri-Yakub BT. Capacitive micromachined ultrasonic transducers: fabrication technology. IEEE Trans Ultrason Ferroelect Freq Control. 2005; 52:2242–58. 15. Kumagai M, Uchiyama N, Ohmura E, Sugiura R, Atsumi K, Fukumitsu K. Advanced dicing technology for semiconductor wafer-Stealth dicing. IEEE Trans Semicond Manuf. 2007; 20:259– 65. 16. Porter DA, Berfield TA. Die separation and rupture strength for deep reactive ion etched silicon wafers. J Micromech Microeng. 2013; 23:085020. 17. Heriban D, Agnus J, Petrini V, Gauthier M. A mechanical de-tethering technique for silicon MEMS etched with a DRIE process. J Micromech Microeng. 2009; 19:055011. 18. Chang C, Wang YF, Kanamori Y, Shih JJ, Kawai Y, Lee CK, Wu KC, Esashi M. Etching submicrometer trenches by using the Bosch process and its application to the fabrication of antireflection structures. J Micromech Microeng. 2005; 15:580–85. 19. Chen JW, Provine J, Klejwa N, Howe R. A dry wafer-reconstitution process with zero insertion force by embedded alignment guide tables. J Micromech Microeng. 2012; 22:065007. 20. Nakao S, Ando T, Shikida M, Sato K. Effect of temperature on fracture toughness in a singlecrystal-silicon film and transition in its fracture mode. J Micromech Microeng. 2008; 18:015026. 21. Bhuyan, A.; Chang, C.; Choe, JW.; Lee, BC.; Nikoozadeh, A.; Oralkan, O.; Khuri-Yakub, BT. A 32 by 32 integrated CMUT array for volumetric ultrasound imaging. Proc. IEEE Int. Ultrasonics Symp; Prague. Jul. 2013; 2013. p. IUS1-D3-1 22. Cobbold, RSC. Foundations of Biomedical Ultrasound. Vol. chapter 7. Oxford: Oxford University Press; 2007. p. 413-91. 23. Szabo, TL. Diagnostic Ultrasound Imaging: Inside Out. Amsterdam: Elsevier; 2004. p. 7171-212. 24. Faheem FF, Lee YC. Tether-and post-enabled flip-chip assembly for manufacturable RF-MEMS. Sensor Actuators A. 2004; 114:486–95. 25. Colinjivadi KS, Cui Y, Ellis M, Skidmore G, Lee JB. De-tethering of high aspect ratio metallic and polymeric MEMS/ NEMS parts for the direct pick-and-place assembly of 3D microsystem. Microsyst Technol. 2008; 14:1621–26. 26. Haobing L, Chollet F. Layout controlled one-step dry etch and release of MEMS using deep RIE on SOI wafer. J Microelectromech Syst. 2006; 15:541–47. 27. de Boer MJ, Gardeniers JGE, Jansen HV, Smulders E, Gilde MJ, Roelofs G, Sasserath JN, Elwenspoek M. Guidelines for etching silicon MEMS structures using fluorine high-density plasma at cryogenic temperatures. J Microelectromech Syst. 2002; 11:385–401.
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Author Manuscript Author Manuscript Figure 1.
The cross-section of a CMUT element prior to singulation. (Only two cells corresponding to two cavities for the element are shown in the figure.)
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Figure 2.
Micrographs of the etched trenches for the CMUT singulation: (a) front side (CMUT side) and (c) back side (UBM side) of the wafer. (b) and (d) Magnifications of (a) and (c) near the outer etched trenches. The blue dashed box in (b) shows one element of the outmost ring (Ring 4) in the four CMUT ring arrays. The element consists of 5 × 4 circular cells. (A = 10 μm, B = 40 μm, C = 110 μm, D = 180 μm, the inner diameter of the ring device Di = 5 mm, and the outer diameter of the ring device Do = 10 mm.)
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Author Manuscript Author Manuscript Author Manuscript Figure 3.
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Fabrication of CMUT singulation: (a) etching trenches; (b) thick PR patterning; (c) attaching the CMUT wafer to a support wafer coated with unbaked PR (adhesive) and baking the bonded wafers on a hot plate; (d) DRIE and tether formation; (e) removing PR and then releasing the CMUT device from the wafer by breaking the tether (de-tethering).
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Author Manuscript Author Manuscript Figure 4.
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Singulated CMUT chip (front side of the wafer): (a) soaking the wafer in acetone to remove PR; (b) the right portion of the singulated CMUT ring array; (c) magnification of the broken tether near the edge of the device; and (d) magnification of Ring 2 and Ring 3, where the dashed box indicates one element of Ring 2. (c) and (d) Magnifications of the right and left dashed boxes shown in (b).
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Author Manuscript Author Manuscript Figure 5.
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Measurement of input impedance with RF probing on the backside of the CMUT ring arrays: (a) experimental setup and (b) magnification of the RF probes contacting the UBM pads.
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Figure 6.
Input impedance of a CMUT element of the second ring (Ring 2) arrays: (a) amplitude and (b) phase.
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Table 1
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Physical dimensions of the CMUT imaging ring arrays (Ring 2). Values (unit: μm)
Parameters Thickness of wafer
400
Radius of membrane for a CMUT cell
16
Thickness of membrane
0.7
Gap height in the cavity
0.2
Thickness of insulation layer
0.15
Radius of top electrode
15
Thickness of top electrode
0.3
Radius of through-wafer via
25
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Thickness of poly-Si bottom electrode
0.95
Thickness of thermal oxide layer
1.0
Thickness of LTO layer
0.28
Thickness of backside Al layer
0.3
Thickness of UBM layers (Au/ Ni/ Ti)
0.15/ 0.25/ 0.01
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Table 2
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The DRIE conditions for etching trenches by using STS etcher. Parameters
a
Values
Cycle step
Etching
Passivation
Gas flowrate (sccm)
SF6: 130
C4F8: 85
Active time (s)
12
7
Overlap (s)
1
0.5
Pressure (mtorr)
33
18~19
APCa
70%
70%
Coil RF power (W)
600
600
Platen RF power (W)
120
0
APC = auto pressure control
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