Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O’s Philippe P. Absil,* Peter Verheyen, Peter De Heyn, Marianna Pantouvaki, Guy Lepage, Jeroen De Coster, and Joris Van Campenhout imec, Leuven, Belgium * [email protected]
Abstract: Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology. ©2015 Optical Society of America OCIS codes: (130.0130) Integrated optics; (230.0230) Optical devices; (140.4780) Optical resonators; (130.7408) Wavelength filtering devices; (130.4110) Modulators; (040.5160) Photodetectors.
References and links 1. 2. 3. 4. 5. 6. 7.
8. 9. 10. 11. 12.
13.
D. A. B. Miller, “Device Requirements for Optical Interconnects to Silicon Chips,” Proc. IEEE 97(7), 1166– 1185 (2009). A. Krishnamoorthy, H. Schwetman, P. Koka, I. Shubin, and J. Cunningham, “Computer Systems Based on Silicon Photonic Interconnects,” Proc. IEEE 97(7), 1337–1361 (2009). F. E. Doany, “High Density Optical Interconnects for High Performance Computing,” Optical Fiber Communication Conference 2014, San Francisco, USA, M3G.1 (2014). F. Y. Liu, D. Patil, J. Lexau, P. Amberg, M. Dayringer, J. Gainsley, H. F. Moghadam, X. Zheng, J. E. Cunningham, A. V. Krishnamoorthy, E. Alon, and R. Ho, “10-Gbps, 5.3-mW optical transmitter and receiver circuits in 40-nm CMOS,” J. Solid State Circuits 47(9), 2049–2067 (2012). C. Cole, I. Lyubomirsky, A. Ghiasi, and V. Telang, “Higher-Order Modulation for Client Optics,” IEEE Commun. Mag. 51(3), 50–57 (2013). M. Rakowski, M. Pantouvaki, H. Yu, W. Bogaerts, K. de Meyer, M. Steyaert, B. Snyder, P. O'Brien, J. Ryckaert, P. Absil, and J. Van Campenhout, “Low-Power, Low-Penalty, Flip-Chip Integrated, 10Gb/s Ring-Based 1V CMOS Photonics Transmitter,” Optical Fiber Communication Conference 2013, Anaheim, USA, OM2H (2013). V. I. Kopp, J. Park, M. S. Wlodawski, E. Hubner, J. Singer, D. Neugroschl, A. Z. Genack, P. Dumon, J. Van Campenhout, and P. Absil, “Two-dimensional, 37-channel, High-bandwidth, Ultra-dense Silicon Photonics Optical Interface,” Optical Fiber Communication Conference, OSA Technical Digest (online) (Optical Society of America, 2014), post-deadline paper (2014). D. Taillaert, H. Chong, R. M. De La Rue, P. I. Borel, L. H. Frandsen, and R. Baets, “A Compact Twodimensional Grating Coupler used as a Polarization Splitter,” IEEE Photon. Technol. Lett. 15(9), 1249–1251 (2003). E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nat. Commun. 5, 4008 (2014). C. T. DeRose, D. C. Trotter, W. A. Zortman, A. L. Starbuck, M. Fisher, M. R. Watts, and P. S. Davids, “Ultra compact 45 GHz CMOS compatible Germanium waveguide photodiode with low dark current,” Opt. Express 19(25), 24897–24904 (2011). F. Y. Liu, D. Patil, J. Lexau, P. Amberg, M. Dayringer, J. Gainsley, H. F. Moghadam, X. Zheng, J. E. Cunningham, A. V. Krishnamoorthy, E. Alon, and R. Ho, “10-Gbps, 5.3-mW optical transmitter and receiver circuits in 40-nm CMOS,” J. Solid State Circuits 47(9), 2049–2067 (2012). P. Verheyen, M. Pantouvaki, P. De Heyn, H. Chen, G. Lepage, J. De Coster, P. Dumon, A. Masood, D. Van Thourhout, R. Baets, W. Bogaerts, P. Absil, and J. Van Campenhout, “Highly Uniform 25 Gb/s Si Photonics Platform for High-Density, Low-Power WDM Optical Interconnects,” Integrated Photonics Research Conference 2014, United States of America, (2014). A. V. Krishnamoorthy, T. Pinguet, A. Mekis, H. Thacker, I. Shubin, K. Raj, and J. E. Cunningham, “Exploiting CMOS Manufacturing to Reduce Tuning Requirements for Resonant Optical Devices,” IEEE Photon. J. 3(3), 567–579 (2011).
#226741 - $15.00 USD © 2015 OSA
Received 17 Nov 2014; revised 13 Jan 2015; accepted 14 Jan 2015; published 3 Apr 2015 6 Apr 2015 | Vol. 23, No. 7 | DOI:10.1364/OE.23.009369 | OPTICS EXPRESS 9369
14. S. K. Selvaraja, E. Rosseel, L. Fernandez, M. Tabat, W. Bogaerts, J. Hautala, and P. Absil, “SOI thickness uniformity improvement using corrective etching for silicon nano-photonic device,” Group Four Photonics Conference 2011, London, United Kingdom, P1.5 (2011). 15. S. K. Selvaraja, P. De Heyn, G. Winroth, P. Ong, G. Lepage, C. Cailler, A. Rigny, K. Bourdelle, W. Bogaerts, D. Van Thourhout, J. Van Campenhout, and P. D. VanThourhout, J. Van Campenhout, and P. Absil Absil, “Highly uniform and low-loss passive silicon photonics devices using a 300mm CMOS platform,” Optical Fiber Communication Conference 2014, United States of America, paper Th2A.33 (2014). 16. D. Taillaert, F. Van Laere, M. Ayre, W. Bogaerts, D. Van Thourhout, P. Bienstman, and R. Baets, “Grating couplers for coupling between optical fibers and nanophotonic waveguides,” Jpn. J. Appl. Phys. 45(8A), 6071– 6077 (2006). 17. L. Verslegers, A. Mekis, T. Pinguet, Y. Chi, G. Masini, P. Sun, A. Ayazi, K. Y. Hon, S. Sahni, S. Gloeckner, C. Baudot, F. Boeuf, and P. De Dobbelaere, “Silicon photonics devices libraries for high-speed transceivers,” IEEE Photonics Conference 2014, San Diego, United States of America, MC3.4 (2014). 18. W. D. Sacher, Y. Huang, L. Ding, B. J. F. Taylor, H. Jayatilleka, G.-Q. Lo, and J. K. S. Poon, “Wide bandwidth and high coupling efficiency Si3N4-on-SOI dual-level grating coupler,” Opt. Express 22(9), 10938–10947 (2014). 19. D. Vermeulen, S. Selvaraja, P. Verheyen, G. Lepage, W. Bogaerts, P. Absil, D. Van Thourhout, and G. Roelkens, “High-efficiency fiber-to-chip grating couplers realized using an advanced CMOS-compatible siliconon-insulator platform,” Opt. Express 18(17), 18278–18283 (2010). 20. P. De Heyn, J. De Coster, P. Verheyen, G. Lepage, M. Pantouvaki, P. Absil, W. Bogaerts, D. Van Thourhout, and J. Van Campenhout, “Polarization-Insensitive 5x20Gb/s WDM Ge Receiver using Compact Si Ring Filters with Collective Thermal Tuning,” Optical Fiber Communications Conference 2014, United States of America, paper Th4C.5 (2014). 21. S. Agarwal, M. Ingels, M. Rakowski, M. Pantouvaki, M. Steyaert, P. Absil, and J. Van Campenhout, “Monitoring Optical Modulation Amplitude using a Low-Power CMOS Circuit for Thermal Control of Si Ring Transmitters,” ECOC Conference September 2014, France P.4.17 (2014).
1. Introduction The requirements for package-to-package input-output (I/O) interfaces in future high performance computing systems scale up to multiple of Tb/s as defined by the International Technology Roadmap for Semiconductors (ITRS) and further detailed by D. Miller [1] and A. Krishnamoorthy [2]. The traditional scaling of I/O’s using electrical links for data transmission faces many bottlenecks such as pin count and bandwidth-distance-power tradeoff. In the past decades optical fibers have gradually replaced electrical wires from transoceanic cables to fiber-to-the-home and data centers rack-to-rack cables, exploiting the very wide bandwidth and low loss of optical fibers. Today’s technology developments focus on implementing “in-package” optical solution with a direct interface to CMOS chips by using arrays of directly modulated lasers and surface illuminated photo-detectors [3] or integrated silicon photonics compact modulators and waveguide photo-detectors [4]. In this paper we present our progress towards the realization of multi-Tb/s optical links using silicon photonics circuits. We will first propose a multiplexing architecture to realize very-high bandwidth density. The realization of the key building blocks in an integrated fabrication platform will then be described, followed by a study of the optical devices performance variability. 2. Multiplexing architecture using compact silicon photonics circuits Various multiplexing approaches are pursued in optical communication to increase the number of bits per second transmitted per physical line without increasing the individual channel data rate: primarily pulse amplitude modulation (PAM), phase shift keying modulation (PSK) [5], wavelength division multiplexing (WDM) and space division multiplexing (SDM) using multicore fibers. Because of the expected electronics complexity required for PAM or PSK (forward error correction and digital signal processing) making them less favorable for direct interfacing with CMOS, we have selected a combination of WDM and SDM as a multiplexing strategy. Following a similar approach as in [4], a possible optical architecture is proposed as depicted in Fig. 1. The transmitter is based on a dense WDM continuous wave (cw) laser source, feeding multiple arrays of micro-ring resonator (MRR) modulators [6]. Each MRR modulator in one array modulates only one channel of the WDM laser source by tuning its operating wavelength with an integrated heater. Each transmitter array ends with a chip-to-
#226741 - $15.00 USD © 2015 OSA
Received 17 Nov 2014; revised 13 Jan 2015; accepted 14 Jan 2015; published 3 Apr 2015 6 Apr 2015 | Vol. 23, No. 7 | DOI:10.1364/OE.23.009369 | OPTICS EXPRESS 9370
fiber coupler, organized in a two dimensional hexagonal array to interface with a single multicore fiber to combine WDM and SDM. An example of such compact chip-to-fiber assembly was demonstrated in [7] with a pitch reducing optical fiber array (PROFA) down to a pitch of 40μm. The receiver couples the light from the multicore fiber onto the silicon photonics chip by the mean of an array of polarization splitting grating couplers [8]. Each output waveguide of these couplers connects to an array of MRR wavelength filters where each pair of filters drops the same selected wavelength onto a common waveguide-based germanium photo-detectors (Ge WPD). Each filter is tuned with its own integrated heater but all heaters are controlled with a common feedback loop and common heater current. Assuming eight wavelength channels, a PROFA fiber of sixty-one cores (two cores are used for active alignment and cannot be used for data transmission) and a link data rate of 28Gbps, such an architecture can achieve an aggregate bandwidth of 13.2Tb/s. Each core data eight-channel link transmit/receive unit occupies an area of less than 134,400μm2, when assuming a micro-bump pitch of 40μm. Hence the aggregate bandwidth of 13.2Tb/s is realized in an area of 7.93mm2 with an additional area of 0.32mm2 to support the PROFA fiber coupling. Thus this architecture realizes a transceiver area density of 1.6Tb/s/mm2 and an extremely large escape bandwidth areal density of 41.3Tb/s/mm2. Moreover the use of extremely compact photonics devices with low capacitance such as MRR modulators (
Abstract: Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology. ©2015 Optical Society of America OCIS codes: (130.0130) Integrated optics; (230.0230) Optical devices; (140.4780) Optical resonators; (130.7408) Wavelength filtering devices; (130.4110) Modulators; (040.5160) Photodetectors.
References and links 1. 2. 3. 4. 5. 6. 7.
8. 9. 10. 11. 12.
13.
D. A. B. Miller, “Device Requirements for Optical Interconnects to Silicon Chips,” Proc. IEEE 97(7), 1166– 1185 (2009). A. Krishnamoorthy, H. Schwetman, P. Koka, I. Shubin, and J. Cunningham, “Computer Systems Based on Silicon Photonic Interconnects,” Proc. IEEE 97(7), 1337–1361 (2009). F. E. Doany, “High Density Optical Interconnects for High Performance Computing,” Optical Fiber Communication Conference 2014, San Francisco, USA, M3G.1 (2014). F. Y. Liu, D. Patil, J. Lexau, P. Amberg, M. Dayringer, J. Gainsley, H. F. Moghadam, X. Zheng, J. E. Cunningham, A. V. Krishnamoorthy, E. Alon, and R. Ho, “10-Gbps, 5.3-mW optical transmitter and receiver circuits in 40-nm CMOS,” J. Solid State Circuits 47(9), 2049–2067 (2012). C. Cole, I. Lyubomirsky, A. Ghiasi, and V. Telang, “Higher-Order Modulation for Client Optics,” IEEE Commun. Mag. 51(3), 50–57 (2013). M. Rakowski, M. Pantouvaki, H. Yu, W. Bogaerts, K. de Meyer, M. Steyaert, B. Snyder, P. O'Brien, J. Ryckaert, P. Absil, and J. Van Campenhout, “Low-Power, Low-Penalty, Flip-Chip Integrated, 10Gb/s Ring-Based 1V CMOS Photonics Transmitter,” Optical Fiber Communication Conference 2013, Anaheim, USA, OM2H (2013). V. I. Kopp, J. Park, M. S. Wlodawski, E. Hubner, J. Singer, D. Neugroschl, A. Z. Genack, P. Dumon, J. Van Campenhout, and P. Absil, “Two-dimensional, 37-channel, High-bandwidth, Ultra-dense Silicon Photonics Optical Interface,” Optical Fiber Communication Conference, OSA Technical Digest (online) (Optical Society of America, 2014), post-deadline paper (2014). D. Taillaert, H. Chong, R. M. De La Rue, P. I. Borel, L. H. Frandsen, and R. Baets, “A Compact Twodimensional Grating Coupler used as a Polarization Splitter,” IEEE Photon. Technol. Lett. 15(9), 1249–1251 (2003). E. Timurdogan, C. M. Sorace-Agaskar, J. Sun, E. Shah Hosseini, A. Biberman, and M. R. Watts, “An ultralow power athermal silicon modulator,” Nat. Commun. 5, 4008 (2014). C. T. DeRose, D. C. Trotter, W. A. Zortman, A. L. Starbuck, M. Fisher, M. R. Watts, and P. S. Davids, “Ultra compact 45 GHz CMOS compatible Germanium waveguide photodiode with low dark current,” Opt. Express 19(25), 24897–24904 (2011). F. Y. Liu, D. Patil, J. Lexau, P. Amberg, M. Dayringer, J. Gainsley, H. F. Moghadam, X. Zheng, J. E. Cunningham, A. V. Krishnamoorthy, E. Alon, and R. Ho, “10-Gbps, 5.3-mW optical transmitter and receiver circuits in 40-nm CMOS,” J. Solid State Circuits 47(9), 2049–2067 (2012). P. Verheyen, M. Pantouvaki, P. De Heyn, H. Chen, G. Lepage, J. De Coster, P. Dumon, A. Masood, D. Van Thourhout, R. Baets, W. Bogaerts, P. Absil, and J. Van Campenhout, “Highly Uniform 25 Gb/s Si Photonics Platform for High-Density, Low-Power WDM Optical Interconnects,” Integrated Photonics Research Conference 2014, United States of America, (2014). A. V. Krishnamoorthy, T. Pinguet, A. Mekis, H. Thacker, I. Shubin, K. Raj, and J. E. Cunningham, “Exploiting CMOS Manufacturing to Reduce Tuning Requirements for Resonant Optical Devices,” IEEE Photon. J. 3(3), 567–579 (2011).
#226741 - $15.00 USD © 2015 OSA
Received 17 Nov 2014; revised 13 Jan 2015; accepted 14 Jan 2015; published 3 Apr 2015 6 Apr 2015 | Vol. 23, No. 7 | DOI:10.1364/OE.23.009369 | OPTICS EXPRESS 9369
14. S. K. Selvaraja, E. Rosseel, L. Fernandez, M. Tabat, W. Bogaerts, J. Hautala, and P. Absil, “SOI thickness uniformity improvement using corrective etching for silicon nano-photonic device,” Group Four Photonics Conference 2011, London, United Kingdom, P1.5 (2011). 15. S. K. Selvaraja, P. De Heyn, G. Winroth, P. Ong, G. Lepage, C. Cailler, A. Rigny, K. Bourdelle, W. Bogaerts, D. Van Thourhout, J. Van Campenhout, and P. D. VanThourhout, J. Van Campenhout, and P. Absil Absil, “Highly uniform and low-loss passive silicon photonics devices using a 300mm CMOS platform,” Optical Fiber Communication Conference 2014, United States of America, paper Th2A.33 (2014). 16. D. Taillaert, F. Van Laere, M. Ayre, W. Bogaerts, D. Van Thourhout, P. Bienstman, and R. Baets, “Grating couplers for coupling between optical fibers and nanophotonic waveguides,” Jpn. J. Appl. Phys. 45(8A), 6071– 6077 (2006). 17. L. Verslegers, A. Mekis, T. Pinguet, Y. Chi, G. Masini, P. Sun, A. Ayazi, K. Y. Hon, S. Sahni, S. Gloeckner, C. Baudot, F. Boeuf, and P. De Dobbelaere, “Silicon photonics devices libraries for high-speed transceivers,” IEEE Photonics Conference 2014, San Diego, United States of America, MC3.4 (2014). 18. W. D. Sacher, Y. Huang, L. Ding, B. J. F. Taylor, H. Jayatilleka, G.-Q. Lo, and J. K. S. Poon, “Wide bandwidth and high coupling efficiency Si3N4-on-SOI dual-level grating coupler,” Opt. Express 22(9), 10938–10947 (2014). 19. D. Vermeulen, S. Selvaraja, P. Verheyen, G. Lepage, W. Bogaerts, P. Absil, D. Van Thourhout, and G. Roelkens, “High-efficiency fiber-to-chip grating couplers realized using an advanced CMOS-compatible siliconon-insulator platform,” Opt. Express 18(17), 18278–18283 (2010). 20. P. De Heyn, J. De Coster, P. Verheyen, G. Lepage, M. Pantouvaki, P. Absil, W. Bogaerts, D. Van Thourhout, and J. Van Campenhout, “Polarization-Insensitive 5x20Gb/s WDM Ge Receiver using Compact Si Ring Filters with Collective Thermal Tuning,” Optical Fiber Communications Conference 2014, United States of America, paper Th4C.5 (2014). 21. S. Agarwal, M. Ingels, M. Rakowski, M. Pantouvaki, M. Steyaert, P. Absil, and J. Van Campenhout, “Monitoring Optical Modulation Amplitude using a Low-Power CMOS Circuit for Thermal Control of Si Ring Transmitters,” ECOC Conference September 2014, France P.4.17 (2014).
1. Introduction The requirements for package-to-package input-output (I/O) interfaces in future high performance computing systems scale up to multiple of Tb/s as defined by the International Technology Roadmap for Semiconductors (ITRS) and further detailed by D. Miller [1] and A. Krishnamoorthy [2]. The traditional scaling of I/O’s using electrical links for data transmission faces many bottlenecks such as pin count and bandwidth-distance-power tradeoff. In the past decades optical fibers have gradually replaced electrical wires from transoceanic cables to fiber-to-the-home and data centers rack-to-rack cables, exploiting the very wide bandwidth and low loss of optical fibers. Today’s technology developments focus on implementing “in-package” optical solution with a direct interface to CMOS chips by using arrays of directly modulated lasers and surface illuminated photo-detectors [3] or integrated silicon photonics compact modulators and waveguide photo-detectors [4]. In this paper we present our progress towards the realization of multi-Tb/s optical links using silicon photonics circuits. We will first propose a multiplexing architecture to realize very-high bandwidth density. The realization of the key building blocks in an integrated fabrication platform will then be described, followed by a study of the optical devices performance variability. 2. Multiplexing architecture using compact silicon photonics circuits Various multiplexing approaches are pursued in optical communication to increase the number of bits per second transmitted per physical line without increasing the individual channel data rate: primarily pulse amplitude modulation (PAM), phase shift keying modulation (PSK) [5], wavelength division multiplexing (WDM) and space division multiplexing (SDM) using multicore fibers. Because of the expected electronics complexity required for PAM or PSK (forward error correction and digital signal processing) making them less favorable for direct interfacing with CMOS, we have selected a combination of WDM and SDM as a multiplexing strategy. Following a similar approach as in [4], a possible optical architecture is proposed as depicted in Fig. 1. The transmitter is based on a dense WDM continuous wave (cw) laser source, feeding multiple arrays of micro-ring resonator (MRR) modulators [6]. Each MRR modulator in one array modulates only one channel of the WDM laser source by tuning its operating wavelength with an integrated heater. Each transmitter array ends with a chip-to-
#226741 - $15.00 USD © 2015 OSA
Received 17 Nov 2014; revised 13 Jan 2015; accepted 14 Jan 2015; published 3 Apr 2015 6 Apr 2015 | Vol. 23, No. 7 | DOI:10.1364/OE.23.009369 | OPTICS EXPRESS 9370
fiber coupler, organized in a two dimensional hexagonal array to interface with a single multicore fiber to combine WDM and SDM. An example of such compact chip-to-fiber assembly was demonstrated in [7] with a pitch reducing optical fiber array (PROFA) down to a pitch of 40μm. The receiver couples the light from the multicore fiber onto the silicon photonics chip by the mean of an array of polarization splitting grating couplers [8]. Each output waveguide of these couplers connects to an array of MRR wavelength filters where each pair of filters drops the same selected wavelength onto a common waveguide-based germanium photo-detectors (Ge WPD). Each filter is tuned with its own integrated heater but all heaters are controlled with a common feedback loop and common heater current. Assuming eight wavelength channels, a PROFA fiber of sixty-one cores (two cores are used for active alignment and cannot be used for data transmission) and a link data rate of 28Gbps, such an architecture can achieve an aggregate bandwidth of 13.2Tb/s. Each core data eight-channel link transmit/receive unit occupies an area of less than 134,400μm2, when assuming a micro-bump pitch of 40μm. Hence the aggregate bandwidth of 13.2Tb/s is realized in an area of 7.93mm2 with an additional area of 0.32mm2 to support the PROFA fiber coupling. Thus this architecture realizes a transceiver area density of 1.6Tb/s/mm2 and an extremely large escape bandwidth areal density of 41.3Tb/s/mm2. Moreover the use of extremely compact photonics devices with low capacitance such as MRR modulators (
