Acta Biomaterialia 10 (2014) 960–967

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Lifetime assessment of atomic-layer-deposited Al2O3–Parylene C bilayer coating for neural interfaces using accelerated age testing and electrochemical characterization Saugandhika Minnikanti a,⇑, Guoqing Diao b, Joseph J. Pancrazio a,c, Xianzong Xie d, Loren Rieth d, Florian Solzbacher d, Nathalia Peixoto a,c,⇑ a

Electrical and Computer Engineering Department, George Mason University, 4400 University Dr. MSN 1G5, Fairfax, VA 22030, USA Department of Statistics, George Mason University, 4400 University Dr., Fairfax, VA 22030, USA c Bioengineering Department, George Mason University, 4400 University Dr. MSN 1G5, Fairfax, VA 22030, USA d Electrical and Computer Engineering, University of Utah, 50 S. Central Campus Dr., Salt Lake City, UT 84112, USA b

a r t i c l e

i n f o

Article history: Received 13 June 2013 Received in revised form 18 October 2013 Accepted 24 October 2013 Available online 1 November 2013 Keywords: Parylene C Al2O3 Electrochemical impedance spectroscopy Accelerated lifetime testing Interdigitated electrode arrays

a b s t r a c t The lifetime and stability of insulation are critical features for the reliable operation of an implantable neural interface device. A critical factor for an implanted insulation’s performance is its barrier properties that limit access of biological fluids to the underlying device or metal electrode. Parylene C is a material that has been used in FDA-approved implantable devices. Considered a biocompatible polymer with barrier properties, it has been used as a substrate, insulation or an encapsulation for neural implant technology. Recently, it has been suggested that a bilayer coating of Parylene C on top of atomic-layer-deposited Al2O3 would provide enhanced barrier properties. Here we report a comprehensive study to examine the mean time to failure of Parylene C and Al2O3–Parylene C coated devices using accelerated lifetime testing. Samples were tested at 60 °C for up to 3 months while performing electrochemical measurements to characterize the integrity of the insulation. The mean time to failure for Al2O3–Parylene C was 4.6 times longer than Parylene C coated samples. In addition, based on modeling of the data using electrical circuit equivalents, we show here that there are two main modes of failure. Our results suggest that failure of the insulating layer is due to pore formation or blistering as well as thinning of the coating over time. The enhanced barrier properties of the bilayer Al2O3–Parylene C over Parylene C makes it a promising candidate as an encapsulating neural interface. Ó 2013 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved.

1. Introduction Implantable neuroprosthetic devices offer the promise of restoring neurological function to disabled individuals [1–3]. Prior work has demonstrated that arrays of microelectrodes implanted in the motor cortex yield single unit and local field potential recordings that encode information on intended movement [4]. By capturing electrical signals corresponding to volitional movement, these devices have clinical implications as communication devices for locked-in patients [5], as well as control signal sources for paralyzed muscles on prosthetic limbs. Currently implantable electrode arrays under investigation can be categorized into three basic structures [6]: arrays built of micro⇑ Corresponding authors. Tel.: +1 240 5154419 (S. Minnikanti). Address: Electrical and Computer Engineering Department, George Mason University, 4400 University Dr. MSN 1G5, Fairfax, VA 22030, USA. Tel.: +1 703 7283083 (N. Peixoto). E-mail addresses: [email protected] (S. Minnikanti), npeixoto@ gmu.edu (N. Peixoto).

wires [7], silicon-based micromachined [8] and flexible polymeric arrays [9]. Substrates for microwire-based arrays are usually tungsten [10], stainless steel [11,12], platinum [13], platinum–iridium [14] or gold [15]. The insulation materials used for microwires are Teflon [16], polyimide [10] or Parylene C [17]. The two most popular silicon-based structures are the Utah electrode array (UEA) [18] and Michigan electrode arrays [19]. UEAs comprise a bed of electrically isolated conductive silicon needles. The tips of the silicon needles are coated with either platinum or iridium oxide. Michigan arrays are planar structures with electrode sites (Ir/Pt/Au) on a silicon-based shank. Commonly used insulation for silicon-based arrays are polyimide [20] or Parylene C [21]. Flexible multielectrode arrays are non-silicon-based structures where the metallic substrate is sandwiched between layers of a polymer such as polyimide [9,22] or Parylene [23]. A major barrier for clinical translation is the lack of device reliability. Microwire arrays typically fail 18 months after implantation [7]. Nevertheless, implanted microwires have been shown to measure neuronal activity successfully for a period of 7 years. However,

1742-7061/$ - see front matter Ó 2013 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved. http://dx.doi.org/10.1016/j.actbio.2013.10.031

S. Minnikanti et al. / Acta Biomaterialia 10 (2014) 960–967

over time the measurable single unit activity reduced, with more electrodes detecting signals from multiple neurons [24]. The authors mentioned the possibility of an increase in electrode surface area [24], probably caused by changes in the insulation coating. While device performance depends on the tissue response [25], there is a growing recognition that device materials may not withstand exposure to the harsh ionic environment in vivo [26]. A widely used encapsulation layer for implantable devices is Parylene C (poly(dichloro-p-xylylene)) [27-30], a semicrystalline polymer that belongs to the family of thermoplasts known as polyparaxylylene (PPX). Parylene C has several advantageous properties including a low dielectric constant and non-cytotoxicity [31], and can be deposited as a conformal, pinhole-free film to accommodate extreme contours including sharp edges and crevices [32]. Nevertheless, failure of Parylene C as an encapsulation and insulator has been reported [33]. In fact, long term in vivo measurements with Parylene C coated microelectrode arrays revealed decreased impedance and concurrent bioelectrical signal loss, suggesting degradation of the insulating layer [5]. Since Parylene C is a common choice as a chronic implantable polymer [34], age accelerated lifetime testing (ALT) of Parylene C on different substrates and structures has been investigated by various groups, with reported lifetimes from 6 months [35] to 1 year [21]. Parylene C coating, although an excellent insulator, has poor adhesion properties towards inorganic and metallic substrates [34,36]. Various techniques such as adhesion promoter primers [33], chemical modification of the polymer (reactive Parylene C) [37] and thermal [38] and plasma treatments [36] are used to improve its adhesion to the underlying substrate. The concept behind treatments based on primer (Silane), plasma or chemical modification is to introduce or increase radical sites available for covalent bonding [39] between Parylene C and substrate. Heat treatments on the other hand anneal Parylene C to increase the efficiency of the physical interlock with the substrate [40,41]. In addition, Parylene C coatings are permeable to water diffusion at a rate of 15 lm min1 [42]. In an effort to improve encapsulation performance, Xie et al. recently reported a bi-layer encapsulation scheme which combines atomic-layer-deposited (ALD) Al2O3 followed by Parylene C [43]. Thin Al2O3 coatings are reported as giving pinhole-free [43] and conformal coverage, even on rough surfaces [44]. This combination of Al2O3 and Parylene C creates dual moisture barriers and may enhance device lifetime, as suggested by preliminary accelerated aging experiments [43]. In this paper, we present a comprehensive comparison of Parylene C and ALD-Al2O3–Parylene C encapsulation lifetimes under accelerated aging conditions. We use electrochemical methods including electrochemical impedance spectroscopy (EIS), leakage current analysis and cyclic voltammetry on coated interdigitated electrodes (IDEs) to monitor electrochemical correlates of insulating layer integrity. Our results demonstrate a statistically significant improvement in encapsulation layer integrity with ALDAl2O3–Parylene C over Parylene C alone. In addition electrical equivalent models of the electrode insulation electrolyte interface offer insights into two distinct mechanisms of device failure over time. Lastly, our work establishes a statistical framework for comparing insulating layer lifetimes in future studies.

2. Material and methods 2.1. Materials IDE test structures were fabricated by our group at the University of Utah and the fabrication process has been described elsewhere [43]. The IDE structure consists of 500 lm thick fused silica substrates (2.7  0.6 cm2) with electrode width and pitch of

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130 lm (Fig. 1). Owing to its higher resistivity compared with silicon substrate, fused silica with a relative thin oxide layer is recommended in order to isolate the performance of Parylene C [45]. The electrodes are layered of Ti (100 nm)/Pt(150 nm)/Au(150 nm). Electrical access to the IDEs was provided by soldering wires to the contact pads. A thin layer of Al2O3 (52 nm) covering the entire surface of the IDE was deposited using plasma-assisted atomic layer deposition. The Al2O3 layer was then silanized with gas-phase adhesion promoter Silane A-174, followed by a 6 lm thick Parylene C layer deposited using the standard Gorham process [46]. The control IDE test structures were coated only with adhesion promoter Silane A-174 and 6 lm Parylene C. A 6 ml glass vial served as the sample holder where the IDEs were sealed to the vial cap. 2.2. Accelerated lifetime testing (ALT) The process for ALT is presented in Fig. 2. Samples from each coating, Parylene C and Al2O3 Parylene C, were initially inspected in air and in phosphate buffered saline (PBS (1), pH 7.4, 2.7 mM KCl and 137 mM NaCl) at room temperature to rule out false positives due to fabrication, handling or transportation damage. This test was followed by samples being age-accelerated in vials containing PBS. Vials were sealed and kept at 60 °C in a thermal bath. A USB temperature sensor (Go!Temp, from Vernier, Beaverton, OR) was enclosed in a separate PBS-filled 6 ml vial and also placed in the thermal bath. The temperature was monitored via Logger Lite software (Vernier, Beaverton, OR) and variations were below ± 2 °C throughout the experiment (for 3 months). Silicone oil was used in the bath to avoid evaporation. The samples were completely submerged in PBS throughout the experiment. PBS (pH 7.4) is the physiological media for biological investigations and is used traditionally for impedance measurements of neural electrodes [47]. The glass transition temperature (Tg) for Parylene C as reported in the literature varies between 55 and 95 °C [48]. ASTM F1980 (American Society for Testing and Materials Standard guide for accelerated aging of sterile medical device packages) recommends that aging temperature do not exceed 60 °C to avoid non-linear variations in the rate of reaction [49], therefore we maintained a constant 60 °C during our experiments. As high impedance measurements are prone to noise, all measurements were conducted within a Faraday cage. Electrochemical testing was only interrupted for 30 min every 2 weeks to replace PBS in the vials. 2.3. Electrochemical characterization Electrochemical characterization of IDE structures consisted of measuring EIS, DC leakage current and cyclic voltammetry (CV) across the fingers of the IDE structure. A 16 channel CHI660D (CH instruments Inc., Austin, TX) potentiostat was used for all electrochemical testing at room temperature and at 60 °C. A two-electrode setup was employed where counter and reference terminals of the potentiostat were shorted and connected to one of the IDE fingers (Fig. 1). The working and working sense were connected to the second IDE finger. PBS (pH 7.4) was used to fill the 6 ml IDE sample holders. The frequency range chosen for EIS was from 0.01 Hz to 10 kHz with a 50 mVrms AC sinusoidal waveform. The measured frequencies were 12 points per decade on a logarithmic scale, and each impedance reported as the average over three cycles of the AC sinusoid. Chronoamperometry was used for measuring leakage currents. The technique involves applying a step pulse, in this case 5 V for 150 s, and the measured response was considered as DC leakage current. The DC current was recorded with a sample interval of 15 s. In the case of CV, the excitation voltage was ramped from 0.6 to 0.6 V at a rate of 50 mV s–1.

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Fig. 1. The interdigitated electrode structure consists of Ti/Pt/Au microelectrodes coated with either Al2O3–Parylene C (52 nm/6 lm) or Parylene C (6 lm). The width and pitch of the interdigitated electrodes are both 130 lm. Wires connected to the solder bond pads provide electrical connections to the IDE structure. Electrochemical characterization is performed using a two-electrode setup where the working electrode/working sense (WE/WS) and the reference electrode/counter electrode (RE/CE) terminals of the potentiostat are connected to the two fingers of the IDE.

Fig. 2. Process for accelerated lifetime testing of Al2O3–Parylene C (52 nm/6 lm) and Parylene C samples (6 lm). The samples are initially inspected via electrochemical characterization (EIS and DC leakage currents) in air and immersed in PBS. All samples that pass the room temperature inspection are placed in the thermal bath for age acceleration. Electrochemical characterization (EIS, DC leakage currents and CVs) are measured every 6 h throughout the course of the experiment. This is followed by MTTF estimation as well as equivalent circuit modeling of the measured EIS spectra.

2.4. Equivalent circuit modeling

2.5. Mean time to failure (MTTF)

As the insulation coating fails the impedance decreases, and dynamic transitions in phase are observable in the measured EIS spectra [50]. Changes in electrical equivalent circuits based on the EIS spectra provide insight into the possible mechanism of failure [51]. In these experiments, the IDEs were connected such that the IDE fingers served as the working and reference electrode. With this setup, the lateral impedance between the coated IDE fingers was measured. An intact insulation can be modeled as a constant phase element (QL) in parallel with a layer resistance (RL) [51]. Thus, the parallel combination of QL and RL was used to model the intact coating covering the IDE fingers, as shown by the inset of Fig. 3a. The impedance of the CPE is mathematically expressed p as ZCPE = Qo1(jx)a, where Qo is a constant, j = 1, x = 2pf and a is a constant between 0 and 1. When a = 1, Qo acts as an ideal capacitor [52]. The CPE accounts for the frequency-dependent capacitance seen in the experimental data, which is attributed to surface inhomogeneity and to the non-ideal dielectric characteristics of the insulation [53]. RL accounts for any conductive pathways through the coating. As the CPE constant accounts for the layer capacitance, henceforth it will be referred to as QL. We used ZSimpWin (EChem Software, Ann Arbor, MI) to fit the EIS data to equivalent circuit models. ZSimpWin employs the down-hill simplex algorithm to optimize the fits by evaluating the impedance function until a local minimum is reached. This software also provides good initial estimates, which are highly essential in regression-based fits. All fits used in this study have chi-squared values lower than 0.001, and error in parameter estimates lower than 20%.

Three metrics were used here to define insulation failure: (a) leakage current above 1 nA, (b) impedance modulus below 0.1 GX for any frequency greater than 1 Hz and (c) impedance phase larger than 80° for any frequency greater than 1 Hz. These criteria were derived from our preliminary experiments as well as from the literature [43,54]. In our experiments, we noticed that the 1 pA leakage current was typical of insulation that was not failing. Many devices withstood leakage currents of 1 pA for over 4 months. Once failure was noticed through the impedance spectroscopy, the leakage current concomitantly increased, suggesting the underlying metal was accessible to the electrolyte, establishing a low resistance path between the IDE fingers. For the purposes of this paper, a ‘‘failed’’ device or insulation samples complied with the three metric thresholds. The time to failure for the insulating layers was estimated from the time stamp on the initial EIS files presenting failed spectra. An exponential distribution was assumed for the failure times for Parylene C and Al2O3–Parylene C IDE sample groups at 60 °C. The MTTF for each sample was expressed as mean ± standard error of the mean (SEM). This was followed by a hypothesis testing to compare the MTTF between the two IDE groups. Specifically, we test the null hypothesis being equal MTTF between Parylene C (l1) and Al2O3–Parylene C (l2) against the one-sided alternative of l2 > l1. All samples that survived the 3 month accelerated aging were included as right censored data. This accounts for the times of failure of the surviving IDEs as being ‘‘right’’ or greater than the 3 month ALT period. Next, the information from this study was used to determine sample sizes for future studies. Specifically, we determined sample sizes

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800 pA (Fig. 4) throughout the study period, while leakage currents exceeded 1 nA for insulation (n = 8) designated as failed for the purposes of this paper (Fig. 5). 3.2. Equivalent circuit modeling

Fig. 3. Complex impedance (Nyquist plots) plots for (a) an intact and (b) a failed coating with respective equivalent circuit models in inset. The solid line indicates the calculated data from the model as proposed in this paper, while the symbol (⁄) represents the calculated impedance with frequency as a parameter, varying from 10 mHz to 10 kHz. The intact coating equivalent circuit (a, inset) is composed of QL (capacitance of the insulation) in parallel with RL (resistance of the insulation). As the insulation degrades, the electrolyte penetrates and the underlying metal is exposed, giving rise to the second semicircle in the Nyquist plot (b). The failed equivalent circuit model (b, inset) includes RP (polarization resistance), Cdl, (double layer capacitance at the exposed metal interface) and W (Warburg impedance, accounting for diffusion of ions across the interface).

necessary to achieve a power of 80% at the significance level of 0.05 to detect an effect size by using a log-rank test. The effect size used in the hypothesis testing and sample calculation is the ratio of (l1/ l2). The following formula and assumptions were used to extrapolate the MTTF to body temperature (37 °C): Q10 = 2 (a 10 °C increase in temperature doubles rate of the chemical reaction), TAA = 60 °C (accelerated aging temperature) and TRS = 37 °C (recommended shelf temperature–body temperature). The simulated age at 37 °C is calculated using the equation below [55]: ½T

Age37  C ¼ ðAge60  C Þ  Q 10AA

T RT =10

EIS was measured for all samples in air before immersion in PBS. The estimated average QL for all the IDEs was 62 ± 1 pF (mean ± SEM, n = 14). A bending of the impedance curve in the Nyquist plots was observed when the electrodes were immersed in PBS at room temperature, suggesting electrolyte penetration through the insulation. A fraction of the Al2O3–Parylene C (2 of 10) and Parylene C (4 out 10) samples failed during room temperature inspection. These samples were not included in the ALT tests or in the results. The changes in parameter values as well as the manifestation of double layer capacitance (Cdl), polarization resistance (RP) and Warburg diffusion impedance (W) help us in understanding the behavior of intact coating as it fails after a period of time. Thus, modeling results for both kinds of samples at day 1 (intact) and at failed time points are summarized in a single table for each material. The intact insulation model (Fig. 3a, inset) was used to characterize the impedance data for all surviving samples. The average QL in PBS compared to air increased by ten-fold for Parylene C (Table 1) and Al2O3–Parylene C IDEs (Table 2). This is due to the penetrating electrolyte having a higher dielectric constant (er = 80) [56] than the Parylene C (er = 3.15) [43]. As expected, the average RL of Al2O3–Parylene C (Table 2) was five times greater than that of Parylene C (Table 1). After room temperature inspection, the samples were kept at 60 °C in PBS. Representative plots from two IDEs

Fig. 4. DC leakage current plotted against time for a stable Al2O3 –Parylene C (52 nm/6 lm) coated sample. Each data point is an average of 180 s of leakage current while 5 VDC is applied across the two electrodes of the same IDE. The sample presents low DC leakage currents with occasional increase, well below the threshold of 1000 pA. The sample is kept at 60 °C throughout the experiment.

ð1Þ

3. Results and discussions 3.1. DC leakage current The DC leakage currents measured in air for Parylene C and Al2O3–Parylene C IDEs were low, with an average of 1 pA (n = 14). An increase in the average DC leakage current to 78 ± 37 pA (mean ± SEM, n = 8) for Al2O3–Parylene C and to 357 ± 41 pA (mean ± SEM, n = 6) for Parylene C was seen after immersion in PBS at room temperature. This is expected, as the initial electrolyte ingress into polymeric coating creates conductive pathways that are absent in air [49]. All coatings on IDEs maintaining barrier properties presented with leakage currents lower than

Fig. 5. DC leakage current plotted against age-accelerated (60 °C) time of a failing Al2O3–Parylene C (52 nm/6 lm) coated sample. Each data point is an average of 150 s of leakage current while 5 VDC is applied across the IDE sample. At 700 h (29 days) the DC leakage currents exceeds 1000 pA, indicating failure.

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Table 1 EIS equivalent circuit model parameters for Parylene C coated IDE samples. Fit parameters

PBS room temp surviving n = 6 (mean ± SEM)

PBS 60 °C @ day fail n = 4 (mean ± SEM)

QL (pF)

151 ± 13 0.96 ± 0.004 5.94 ± 2.4 – – –

312 ± 85 0.95 ± 0.01 2.40 ± 0.52 249 ± 52 0.142 ± 0.031 0.580 ± .0035

a RL (GX) Cdl (pF)* RP (GX)* W (GX S1/2)* *

Applicable to only n = 3 failed electrodes.

Table 2 EIS equivalent circuit model Al2O3–Parylene C coated IDE samples. Fit parameters

PBS-room temp surviving n = 8 (mean ± SEM)

PBS 60 °C @ day fail n = 4 (mean ± SEM)

QL (pF)

156 ± 18 0.97 ± 0.006 25.9 ± 3.2 – – –

4090 ± 1920 0.92 ± 0.03 3.95 ± 0.43 1.32 ± 1.03 0.30 ± 0.22 0.38 ± 0.06

a RL (GX) Cdl (nF) Rp (GX) W (GX S1/2)* *

Applicable to only n = 3 failed electrodes.

illustrate the stability of an intact coating (Fig. 6) and the transition in impedance and phase exhibited by a failed coating (Fig. 7). Specifically, the EIS spectra of the failing insulation show a decrease in the impedance modulus (Fig. 7a) and phase transitioning from 80° (capacitive) towards 0° (resistive) (Fig. 7b), which is consistent with the emergence of a conductive pathway through the insulation. We expect that as the insulating coating degrades, the lateral impedance between the IDE fingers would decrease as soon as underlying metal (Au) on either one of the IDE finger is exposed. Since the reference electrode is a coated IDE finger with high impedance, it needs to be accounted for in the equivalent circuit of a failed coating. To do so, we developed various models incorporating different failure scenarios. The equivalent circuit model fitting the failed insulation accounts for pore formation, allowing electrolyte to access the underlying metal (Fig. 3b, inset). Cdl accounts for capacitance arising due to topographical, structural properties of the underlying metal [57], as well as the charge adsorption and separation occurring at the metal–electrolyte interface [51]; the corrosion rate of the exposed metal is described by a resistor (RP) [33]. The accessible metal is thus modeled as a double layer capacitance (Cdl) in parallel with polarization resistance (RP) and Warburg diffusion impedance (W) of the metal. Warburg impedance is included in the model if the degradation process is diffusion-controlled [51]. It is associated to the mass transport of electroactive species such as oxygen and ions of electrolyte. Of the 14 total IDEs exposed to accelerated aging, four IDEs from each group failed within the 3 month study period. The failed insulation model (Fig. 3b, inset) fit 75% of both Parylene C and Al2O3– Parylene C (Fig. 3b), suggesting a similar failure mechanism. However, 75% of Parylene C samples failed within the first 24 h of age acceleration at 60 °C, while Al2O3–Parylene C failed after longer immersion time (longer than 100 h). The increase in QL for Parylene C and low RL estimates below 3 GX (Table 1) would suggest increased electrolyte penetration. The manifestation of RP indicated access to underlying metal [51]. The estimated a value of failed Parylene C (0.96) was nearly identical to the room temperature estimates (0.95), suggesting the similar surface morphology. The EIS spectra of the Parylene C IDE that failed after the longest immersion time (>1500 h) fit the intact insulation model with an increase in QL and decrease in RL. The increase in QL and decrease

Fig. 6. Overlay of impedance (a) modulus and (b) phase of a stable Al2O3–Parylene C (52 nm/6 lm) coated sample from day 1 (solid red line) to over 1700 h (70 days) (black d) at 60 °C in PBS. The stable impedance spectrum and the phase always around 80° (capacitive characteristics) indicate that the coating maintained its barrier properties throughout the experiment.

in RL suggest either blistering [58,59] thinning [60] or delamination [51]. Failed Al2O3–Parylene C samples also exhibited lower RL, GX (Table 2). The Cdl and RP manifestation is clearly distinguishable in 50% of these samples, with appearance of a second semicircle in a low frequency spectrum of the Nyquist plots (Fig. 3b) [51]. The high frequency semicircle (Fig. 3b) represents the coating characteristics (QL and RL) [51]. Both of these samples failed after 650 h of age acceleration. The large increase in QL for failed Al2O3–Parylene C samples suggests blistering [32], microscopic delamination [25] or thinning [34] of Parylene C coating, while the presence of Cdl and RP would suggest that the Al2O3 layer was exposed and its dissolution [61] led to access of the underlying Au electrodes. The decrease in a for all failed Al2O3–Parylene C samples indicates changes in surface morphology of the coating [60] (Table 2). Consistently, all failed IDE samples presented an increase in leakage current (lA), a decrease in impedance modulus for low frequencies and an increase in the area under the cyclic voltammetry curve, suggesting exposure of the underlying metal. 3.3. Mean time to failure An exponential distribution for failure times (Fig. 8) was assumed to estimate the MTTF in each group. The 95% confidence interval for Parylene C was estimated at (465, 2683) (h) and (1288, 20, 592) (h) for Al2O3–Parylene C. MTTF of Parylene C and Al2O3–Parylene C are listed in Table 3. The p-value for testing the null hypothesis of equal MTTF between groups (l1 = l2) against the one-sided alternative of l2 > l1 is 0.034, with effect size of 4.6 (l2/l1), thus demonstrating statistical significance. The observations suggest that the MTTF of Al2O3–Parylene C is 4.6 times

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Fig. 9. Impedance modulus of a failing Al2O3 (52 nm)–Parylene C (6 lm), for three frequencies (0.01 (blue h), 10 (green e) and 1000 (red ⁄) Hz). The drop in impedance modulus at 0.01 Hz and at 10 Hz at 700 h indicates failure of insulation. However, the modulus of the impedance at 1 kHz is insensitive to the failure and maintains its magnitude for 1700 h.

18 Al2O3–Parylene C IDEs. The MTTF at 37 °C for both samples was extrapolated assuming a Q10 = 2, which allows for a conservative approach for estimating an aging factor for polymers used as barrier systems of medical devices according to ASTM-F1980. Thus, the range of 74.1–222.4 days at 60 °C is equivalent to 1–3 years at 37 °C. 4. Conclusions Fig. 7. Overlay of impedance (a) modulus and (b) phase of Al2O3–Parylene C (52 nm/6 lm) sample under test at 60 °C. At day 1 (solid red line) the sample presents high impedance and phase around –80° (capacitive characteristics) for frequencies greater than 1 Hz. This characteristics is maintained (blue +) for measured time points until day 29 (black d); a decrease in impedance modulus is accompanied by shift in phase towards 30° (conductive characteristics) in the mid-frequency range (1–100 Hz), indicating access of electrolyte to the underlying metal due to insulation failure.

Fig. 8. The time to failure of IDE samples used to calculate statistics reported for the lifetime comparison between Al2O3–Parylene C (solid line) and Parylene C (dashed line) coated samples.

Table 3 Mean time to failure of Parylene C and Al2O3–Parylene C IDE samples.

*

Sample

MTTF (hours) @ 60 °C mean ± SEM

MTTF(days) @ 60 °C mean ± SEM

MTTF@ 37 °C (Q10 = 2)

Parylene C (n = 6) Al2O3–Parylene C (n = 8)

1117 ± 499 5150 ± 2683*

49.1 ± 20.7 214.6 ± 111.8

8 months 36 months

The lifetime of Al2O3–Parylene C coating > Parylene C coating at 60 °C (p = 0.03).

greater than Parylene C. In addition, for the same number of failure events to occur in both groups, assuming an exponential distribution of lifetimes, the required sample size is eight Parylene C and

Our data strongly suggest that the MTTF of Al2O3–Parylene C coating is significantly greater than Parylene C alone. The MTTF37 °C for Parylene C (8 months) reported here is comparable to values reported from other studies using similar coating thickness. Hara et al. reported MTTF37 °C as 6 months for Parylene C sheath microelectrode probes [35], while Li et al. reported 2 days as MTTF90 °C for Parylene C [66], showing that Parylene C coated IDEs maintained barrier properties for more than 1 year at 37 °C. We have shown that the MTTF37 °C of Al2O3–Parylene C (36 months) is an improvement over Parylene C (8 months). Additionally, it is comparable to liquid crystal polymers (LCPs) tested as encapsulation (2 years) [62]. LCPs are known for their lower water intake compared to Parylene C [64,34]. The EIS spectra and equivalent circuit models suggest that there are two modes of failure in the tested IDEs The same circuit (Fig. 3a, inset) fits intact IDEs as well as those that fail after longest immersion time (longer than 1000 h). These failures could be due to blistering of the Parylene C coating, allowing a large volume of electrolyte penetration. The second mode of failure is consistent with pore formation where the electrolyte penetrates the insulation coating enough to expose the underlying metal. These two failure modes are common for polymeric coatings known for allowing water and salt permeation [65]. The commonly reported modes of failure are delamination, blistering and formation of micro-pores [15,17,27,37]. Li et al. reported that Parylene C coatings failed due to the magnification of electrical stresses at imperfection sites causing micro-cracks followed by delamination [66]. Other polymeric coatings show similar modes of failure. Parylene N coatings failure during soak tests was related to micro-crack formation instead of delamination. Polyimide sandwiched layers failed due to dissolution, delamination and blistering [63], possibly due to ‘‘outgassing of trapped moisture’’ [67]. Here, intact coatings maintained high impedance over the 3 month study period while the failed coatings show a decrease in impedance and phase angle transitioning from 80° (capacitive) towards 0° (resistive), indicative of electrolyte access to the underlying metal. A common metric to evaluate the ability of a recording

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electrode [47], as well as the performance of encapsulating insulation for neural interfaces [63], is the impedance modulus at 1 kHz. It is important to recognize that six out of eight failing IDE samples in this study showed no decrease in the impedance modulus at 1 kHz (Fig. 9). The insulation coating has to fail drastically such that its value is lower than the dominating capacitive impedance to reflect changes at higher frequencies [68]. A reduction in the 1 kHz impedance of failed IDE was observed when the 0.1 Hz impedance decreased below 10 MX. Thus, changes in 1 kHz impedance would reflect failure at much later time points and cannot be the only performance metric used as an indication of material stability for implantable electrodes. A decrease in the impedance of implanted neural electrodes due to insulation damage has been reported in the literature, [17,18,69]. Though tremendously valuable, the in vivo validation is beyond the scope of the present study. The significance of IDE coating failures in our testing paradigm on the overall functionality of implanted microelectrode arrays is difficult to extrapolate. Indeed, EIS is very sensitive to minute changes in film integrity. However, the ability of an implanted microelectrode with pinholes or delamination to continue to record neuronal biopotentials will depend on volume conductor conditions. Nevertheless, it is apparent that the insulating character of Al2O3–Parylene C is significantly improved over Parylene C alone, suggesting that this is a promising material modification for increasing neural interface reliability. 5. Disclosures Florian Solzbacher has commercial interest in Blackrock microsystems, which manufactures and sells neural interfaces. Acknowledgements This work was sponsored by the Defense Advanced Research Projects Agency (DARPA) MTO under the auspices of Dr Jack Judy through the Space and Naval Warfare Systems Center, Pacific Grant/Contract No. N66001-12-1-4026 – Biocompatibility of Advanced Materials for Brain Machine Interfaces. Appendix A. Figures with essential colour discrimination Certain figures in this article, particularly Figs. 3 to 7, 9 are difficult to interpret in black and white. The full colour images can be found in the on-line version, at doi:http://dx.doi.org/10.1016/ j.actbio.2013.10.031). References [1] Mak JN, Wolpaw JR. Clinical Applications of Brain-Computer Interfaces: Current State and Future Prospects. Biomed Eng IEEE Rev 2009;2:187–99. [2] Pancrazio JJ, Peckham PH. Neuroprosthetic devices: how far are we from recovering movement in paralyzed patients? Expert Rev Neurother 2009;9(4):427–30. [3] Schwartz AB, Cui XT, Weber DJ, Moran DW. Brain-controlled interfaces: movement restoration with neural prosthetics. Neuron 2006;52(1):205–20. [4] Hochberg LR et al. Neuronal ensemble control of prosthetic devices by a human with tetraplegia. Nature 2006;442(7099):164–71. [5] Simeral JD, Kim SP, Black MJ, Donoghue JP, Hochberg LR. Neural control of cursor trajectory and click by a human with tetraplegia 1000 days after implant of an intracortical microelectrode array. J Neural Eng 2011;8(2):025027. [6] Ghane-Motlagh B, Sawan M. Design and implementation challenges of microelectrode arrays: a review. Mater Sci Appl 2013;4:483–95. [7] Nicolelis MAL, Dimitrov D, Carmena JM, Crist R, Lehew G, Kralik JD, et al. Chronic, multisite, multielectrode recordings in macaque monkeys. Proc Natl Acad Sci 2003;100(19):11041–6. [8] Vetter RJ, Williams JC, Hetke JF, Nunamaker EA, Kipke DR. Chronic neural recording using silicon-substrate microelectrode arrays implanted in cerebral cortex. IEEE Trans Biomed Eng 2004;51(6):896–904.

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Lifetime assessment of atomic-layer-deposited Al2O3-Parylene C bilayer coating for neural interfaces using accelerated age testing and electrochemical characterization.

The lifetime and stability of insulation are critical features for the reliable operation of an implantable neural interface device. A critical factor...
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