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Graphene-based Electrodes for Enhanced Organic Thin Film Transistors Based on Pentacene Sarbani Basu, Mu Chen Lee, and Yeong-Her Wang* 5

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Received (in XXX, XXX) Xth XXXXXXXXX 20XX, Accepted Xth XXXXXXXXX 20XX DOI: 10.1039/b000000x This paper presents 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS- pentacene) and pentacene-based organic thin film transistors (OTFTs) with monolayer graphene source-drain (S-D) electrodes. The electrodes are patterned using conventional photolithographic techniques combined with reactive ion etching. The monolayer graphene film grown by chemical vapor deposition on Cu foil was transferred on a Si dioxide surface using a polymer-supported transfer method to fabricate bottom-gate, bottom-contact OTFTs. The pentacene OTFTs with graphene S-D contacts exhibited superior performance with a mobility of 0.1 cm2V−1s−1 and an on-off ratio of 105 compared with OTFTs with Au-based S-D contacts, which had a mobility of 0.01 cm2V−1s−1 and an on-off ratio of 103. The crystallinity, grain size, and microscopic defects (or number of layers of graphene films) of the TIPS-pentacene/pentacene films were analyzed by Xray diffraction spectroscopy, atomic force microscopy, and Raman spectroscopy, respectively. The feasibility of using graphene as S-D electrodes in OTFTs provides an alternative material with high carrier injection efficiency, chemical stability, and excellent interface properties with organic semiconductors, thus exhibiting improved device performance of C-based electronic OTFTs at a reduced cost. Index Terms — pentacene, solution-process, graphene-electrode OTFTs.

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Organic thin film transistors (OTFTs) have attracted considerable attention because of their vast applications in the field of plastic electronics, such as large-area flat panel displays, radio frequency identification tags, and smart cards.1-3 Several materials, such as C nanotubes (CNTs) and CNT/polymer nanocomposites, have been introduced as source-drain (S-D) electrodes in place of Au to reduce contact resistance.4-6 However, the application of such materials is limited by their high cost and process complexity. The density of CNT is higher than the threshold for forming a percolation network. Moreover, the conductivity of each CNT has a higher value than that of Au. However, two nanotube junctions result in a high resistance that can limit the conductive pathway within CNT films. These obstacles are avoided by conductive polymers, such as poly (3, 4ethylenedioxythiophene): poly (styrenesulfonate) (PEDOT: PSS), which have been successfully applied as solution-processed electrodes in OTFTs.7,8 However, conductive polymers have low conductivity and pristine PEDOT: PSS degrades in Moisture, prohibiting suitable application of OTFTs in ambient condition. As organic active materials are sensitive to photoresist, shadow-mask evaporation is generally used to pattern the S-D contacts on the top of the pentacene for top-contact (TC) OTFTs, which is incompatible with large scale production and limited for a channel length shorter than a few tens of micrometers. Therefore it is desirable to use a bottom-contact (BC) configuration, suitable for lithographic process. However, the performance of pentacene-based BC OTFTs is inferior to that of devices with TC configuration due to its large contact resistance exists between organic semiconductors and metal S-D electrodes. In BC configuration, the thick S-D electrodes on a dielectric layer formed a step, which disturbs the continuous growth of singlephase domain of pentacene layer.9 Furthermore, electrode edges with a large number of grain boundaries contains morphological defects may cause charge carrier traps and disordered growth of This journal is © The Royal Society of Chemistry [year]

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pentacene crystals adjacent to the electrodes. These traps can be considered responsible for the reduced transport properties of BC OTFTs.10 Graphene, a 2D single atomic layer of hexagonally packed honeycomb lattice C atoms possesses similar work function (4.7 eV to 4.9 eV) to that of Au, formed low contact resistance with organic materials, high crystallographic quality and ballistic electron transport on the micrometer scale with only 2.3% of light absorption. Moreover, the combination of its remarkable electrical properties, such as high mobility, saturation velocity for both electrons and holes, strong chemical and thermal stability, and high stretchability offers tremendous advantages for using graphene as a promising transparent conductor in organic electronic devices.11-13 In particularly, S-D electrodes in staggered BC FET structure should be thin enough to make sure step coverage of the active layer.9 Thus, the utilization of monolayer graphene with extremely low thickness (0.3-0.4 nm) offers high transparency in graphene electrodes that covers large areas for next-generation flexible electronic devices and sufficient conductivity of graphene facilitates efficient charge injection and excellent interface properties with Organic semiconductors for ideal S-D electrode application. Recently, several groups succeeded in fabricating graphene S-D electrode. Lee et al. recently demonstrated that OTFTs fabricated via techniques that involve patterning and transferring (P-T) of graphene electrodes exhibit significantly one order higher mobility (μ~0.12 cm2V−1s−1 ) than those fabricated via the reverse (T-P, μ~0.01 cm2V−1s−1) process.8 Zhang et al. reported a large-scale and size-controlled synthesis of graphene oxide (GO) sheets using chemical exfoliation by simply controlling the oxidation and exfoliation procedures.14 Therefore, the solution process compatibility of GO makes it attractive for large-scale production. At present, researchers are focused on the widely applicable reduced graphene oxide (RGO) because of its unique advantages such as low cost, mass production, facile solution process, and easy functionalization.15,16 Becerril et al. evaluated RGO transparent electrodes for p- and n-channel OTFTs.17 [journal], [year], [vol], 00–00 | 1

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Unfortunately, RGO conductivity is too low (70 Scm-1), and thus, the material inevitably contains lattice defects because of C loss during reduction.18,19 Another drawback of RGO electrodes is that devices experienced local heating at the electrode/semiconductor interface under continued operation because of the high resistivity of RGO films. The defect of RGO can reduce charge carrier mobility.18 Moreover, RGO electrodes display improved charge injection, whereas the main problems arise from limited resolution because of wetting/dewetting patterning.17 In our proposed patterned graphene film grown via chemical vapor deposition (CVD), sheet resistivity is extremely low at 0.6 kΩ sq–1 and no heating induced phenomenon is observed. Thus, if the solution process reduction of GO is less than 1000 °C,20,17 then the conductivity of a graphene electrode is relatively low compared with values achieved by higher annealing temperatures used for most reported graphene electrodes/films.15,16 Di et al. demonstrated an inter-digited graphene film can grow directly during a high temperature (~800 °C) vapor–liquid–solid method from an ethanol carbon source on patterned metal catalyst (Cu or Ag) electrodes without contaminating the active channel.21 However, the process is limited to certain electrodes. By considering the above-mentioned factors which can enhance OTFTs performance, we reported a simple plasma etching and conventional photolithography technique for producing precisely controllable patterned graphene electrode, which is more practical for large-scale productions. The graphene film transferred by traditional PMMA supported method was thoroughly examined to evaluate the quality of the film. The advantages of the graphene electrodes confirmed the finding of lowered contact resistance compared to gold electrodes. Furthermore, the orientational homogeneity of pentacene in channel and electrode regions can allow the continuous grain growth at the interface, and their excellent interface compatibility were clearly observed in-details through high-resolution transmission electron microscopy (HRTEM). The growth of pentacene grain was not restricted due to the less thickness of graphene electrode and its lower surface roughness value (< 0.9 nm) was justified by atomic force (AFM) analysis. We additionally investigate the degradation of graphene S-D electrode with time. We focused on pristine graphene as an ideal electrode material instead of RGO/or GO films, which may enhance conductivity and lower material defects. Thus, further high-temperature processes can be avoided.

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Figure 1. (a) Complete schematic of the fabrication steps of bottomgate, bottom-contact TIPS-pentacene OTFTs with monolayer graphene S-D electrodes on a SiO2 (300 nm)/Si substrate. TIPSpentacene was drop-casted via the solution process. The device dimension is W/L = 1500 μm/150 μm.

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The monolayer graphene films grown by CVD on a Cu foil were purchased from Graphene Supermarket (USA). Figure 1 2 | Journal Name, [year], [vol], 00–00

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shows the schematic of the fabrication steps for patterning S-D electrodes using a polymer-supported transfer method. Transfer processes such as those of PMMA,22,23 polydimethylsiloxane,24 and thermal release tapes25 are mostly used to transport CVD grown graphene films into arbitrary substrates. However, thermal release tapes invariably contaminate organic adhesive residues with the transferred graphene surface in roll-to-roll techniques. These trapped contaminants introduce scattering centers and degrade carrier transport properties, which significantly decrease device yields. Graphene was grown on 25 μm-thick Cu foils through the CVD method. A Cu foil was cut into small pieces (1 cm × 1 cm). A PMMA solution (molecular weight 495000g/mol, 4% volume dissolved in anisole) was spin coated (1000 rpm for 30 sec) on the top side of the graphene/Cu substrate. The PMMA film (300 nm thick) was kept at room temperature for 12 h to allow it to dry. The graphene on the bottom side was also removed by O2 plasma etching for 30 s at a power of 200 W. In the subsequent step, Cu layers were etched in 3:1 DIW:HNO3 for 1 min followed by etching in aqueous 0.1 M ammonium persulfate solution(NH4)2S2O8 for approximately 3 h with the end point determined when Cu was no longer visible. A separate fresh ammonium persulfate bath was prepared, and the samples were immersed in the solution for an additional 15 h to ensure that the microscopic metal pieces of Cu had completely disappeared. The resulting PMMA/graphene membrane was rinsed with deionized water and placed on a target SiO2 (300nm)/Si substrate. The film was then slowly cured at room temperature for another 30 min. During drying, the surface tension of water would drag the film to come in contact with the SiO2 surface. However, a small amount of water remained in the gaps (both small and large) between the graphene and the substrate. The electrical contact between the graphene and the substrate was improved by blow-drying the sample with N2 and baking it in air on a hot plate at 150 °C for 15 min. This process could reduce the surface roughness of the transferred PMMA/graphene film. The residual water evaporated completely, and the PMMA was allowed to reflow as it was baked. The improvement is most notable when minimizing large area gaps. The baking step is more effective for reducing the number of cracks than applying a second PMMA layer. 26 Once the sample cooled, the PMMA was dissolved in acetone at 25 °C. Samples prepared using this method was referred to as “transferred graphene.” Ultraviolet lithography was used to pattern the graphene electrodes with a channel width of 1500 μm and a length of 150 μm. AZ1512 photoresist was spin coated on graphene at 6000 rpm for 60 s, followed by baking on a hot plate at 90 °C for 1.5 min. The substrate was exposed in an O 2-plasma cleaner for 6 s with 40 sccm O2 flow and 200 W RF power to etch the graphene film. The photoresist was removed with acetone through the lift-off technique. No treatment [such as octadecyl trichlorosilane (OTS) or hexamethyldisilazane (HMDS)] was performed on SiO2 to avoid additional effects on the electrode. The 65 nm-thick pentacene films that were thermally deposited under a vacuum system served as the semiconductor channel layer. TIPS-pentacene (1 wt%) was dissolved in anisole solvent and drop-casted (0.2 μL) on the channel region. This step is critical in achieving good ohmic contact between TIPSpentacene/pentacene and graphene. Device fabrication, measurements, solution preparation, and drying of the semiconductor layer were conducted in a clean room either in ambient air or in a solvent-rich environment. Recently Liang et al. systematically demonstrated wet chemical methods followed by the modified Radio Corporation of America (RCA) cleaning method, thus combining an effective metal cleaning process with the ability to control the This journal is © The Royal Society of Chemistry [year]

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hydrophilicity of target substrates to better manage contamination and crack formation relative to conventional PMMA-mediated transfer process.27 Cu and Fe are completely removed by the modified RCA cleaning method. Graphene films transferred using the traditional PMMA-assisted approach appeared clean when viewed. The modified RCA cleaning process and the addition of baking steps (150 °C for 15 min after SC-2 etching and baking at 200 °C before device fabrication) can help minimize the formation of large cracks. Improved graphene/substrate interface quality can enhance device performance.

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Figure 2. Typical SEM images of graphene film on SiO2/Si substrate transferred by conventional PMMA-assisted method. Residual metal particles (white circles), small holes (black circles), nanometer-width wrinkles (white solid lines), and small folds or gaps (black dotted arrows) that formed as a result of incomplete contact between the PMMA/graphene stack and the target substrate could be observed. Several multilayer graphene areas (darker contrast was marked by white dotted arrows). Long cracks were also found when samples were handled with Teflon tweezers before Cu etching, as indicated by the black oval circle on the left side. These measurements were conducted on different transferred samples. The scale bars used were in 10 μm, 1μm, and 100 nm levels.

The electrical characteristics of the patterned graphene electrodes for organic devices were investigated using a series of pentacene and 6, 13-bis (triisopropylsilylethynyl) pentacene (TIPS-pentacene)-based OTFTs with BC geometry fabricated on an n-doped (resistivity of ~0.001 ohm/cm to 0.006 ohm/cm, back gate) Si wafer with a 300 nm SiO2 dielectric layer. Device performance was then compared with conventional Au based OTFTs. All measurements were obtained under atmospheric conditions at room temperature. The dielectric properties of the metal–insulator–metal structure were investigated using an HP 4284 C-V plotter. The electrical characteristics of the devices were analyzed with a semiconductor parameter analyzer (Agilent B1500A, CA, USA). The surface morphology of the graphene film on SiO2/Si substrate transferred by conventional PMMAassisted method were monitored using a high-resolution thermal field-emission scanning electron microscope (FE-SEM, JEOL, This journal is © The Royal Society of Chemistry [year]

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JSM-7001). Atomic force microscopy (AFM) images were obtained through the contact mode of a scanning probe microscope. Raman measurement was performed on a Jobin Yvon LabRam HR spectroscope.

Results and Discussion

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Although graphene films transferred by this approach appeared to be clean under moderate magnification optical microscopy (supporting information, Fig. S1), residual small nanoparticles (white circles), which measure less than 100 nm, originate from the CVD graphene growth process and are not Cu substrates etching residues, small holes (black circles), wrinkles (white solid arrow), which are often 40 nm to 50 nm wide and multilayered graphene areas (white dotted arrows) were observed when the samples were examined under a SEM analysis, as shown in Figure 2. Hence, optimized continuous graphene CVD growth procedures can solve this problem.28 Figures 3(a), 3(b), 3(c), and 3(d) depict the 2D surface morphologies of the single-layer graphene transferred on SiO2/Si substrate with different scanning lengths of 15, 10, 5, and 2 μm in scale. Figures 3(e), 3(f), 3(g), and 3(h) indicate the corresponding 3D images of the transferred 2D graphene layers. Small areas with a residue of PMMA [white spots in Figure 3(a) and the supporting optical image Figure S1] were observed. These residues are commonly observed in PMMA-supported graphene transfer processes. Wrinkle formation [shown by an arrow in Figure 3(d)] is related to the release of stress between the Cu foil and the suspended graphene layers upon Cu etching. Wrinkle formation may also be related to the difference in the nature of substrate properties, such as the hydrophilic SiO2/Si substrate and the hydrophobic graphene layers. Furthermore, small patches (white dotted lines), which could be attributed to the grains of the Cu catalyst, could be observed. However, no significant foldings, micrometer-sized residues, and damages inside the graphene layers were found after transferring or patterning through lithography/O2 plasma etching. Otherwise, small gaps or folds (black dotted arrow) attributed to incomplete contact between the PMMA/graphene stack with the target substrate are shown in Figure 2. Previous studies have reported that graphene films tend to break during the final step of PMMA removal. 26 Figures 3(i and k) and Figures 3(j and l) respectively indicate the 2D and 3D surface morphologies of TIPS-pentacene grown on graphene S-D electrodes and SiO2/Si channel region. TIPS-pentacene grains formed on the channel region had a higher value (~1.184 μm) than those grown on graphene S-D electrode (grain size of ~563 nm). Figure 3(m) shows the optical microscopy image of the TIPS-pentacene semiconductor layer drop-casted from the tetralin solution on a channel and the S-D region. Figure 3(n) shows an enlarged view of Figure 3(m), which exhibits clear patterned monolayer graphene S-D electrodes. Figures 3(o) and 3(p) respectively show the 2D and 3D images of a 65 nm-thick pentacene films thermally grown on a bare SiO2 layer. The grain size (1.458 μm) and rms values (~7.064 nm) of the pentacene grown on the channel were higher than those of the pentacene grown on the graphene S-D layer (grain size of ~973, 557 nm and rms values of 15.27, 4.7 nm), as shown in Figures 3(q and r) and 3(s and t), respectively. If the scanning position varies on the graphene S-D region, then Figures 3(r) and 3(t) clearly show that the grain sizes and rms values of the deposited pentacene film are not constant throughout the graphene S-D region because of the presence of PMMA residues. Polymer residues were unavoidably physisorbed on the graphene surface, as shown in Figure 3(a). Hence, the growth characteristics and surface morphology of pentacene affected by Journal Name, [year], [vol], 00–00 | 3

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Figure 3. The 2D tapping mode of the AFM images of the transferred graphene film on SiO 2/Si substrate with scanning ranges of (a) 15 μm, (b) 10 μm, (c) 5 μm, and (d) 2.5 μm. (e), (f), (g), and (h) illustrate the corresponding 3D images. (i) 2D and (j) 3D AFM images of TIPS-pentacene deposited on graphene S-D electrode. (k) 2D and (l) 3D AFM images of TIPS-pentacene deposited on SiO2 layer. (m) Optical microscopy image of TIPS-pentacene drop-casted via the solution process on patterned graphene S-D electrodes. (n) Enlarged view of image (m). AFM images (2 μm × 2 μm), (o) and (p) respectively show the 2D and 3D images of a 65 nm-thick pentacene film thermally grown on bare SiO2 layer. (q) and (s) show the 2D, and (r) and (t) show the 3D images of pentacene films thermally grown on graphene S-D electrodes. The pentacene film grown on graphene S-D electrodes has different roughness and grain sizes because of the presence of PMMA residues (white spots) on graphene during the transfer of graphene from the Cu foil through PMMA support. 2D [(u) and (w)] and 3D [(v) and (x)] AFM images of 65 nm-thick pentacene films at the interface between the bare SiO2 surface and a graphene S-D electrode with different scanning ranges (5 μm × 5 μm) and (10 μm × 10 μm), respectively.

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the surface properties of graphene varied because of the PMMA residues on the graphene surface, rather than the π-π interaction with graphene. Recently, Unarunotai et al. used metal/polymer bilayer supports to reduce residues.29 The remaining residues on the graphene S-D endured 3D growth of the pentacene film, as confirmed in a study of AFM images. The 2D and 3D images of pentacene films grown continuously on the interface between the channel and the electrode are shown in Figures 3(u and w) and 3(v and x), respectively. These transition regions, which are indicated by white lines [Figures 3(v) and 3(x)], strongly suggest better interfaces that facilitate charge injection from the graphene to the semiconductor. The orientational homogeneity of pentacene in the channel and electrode regions allow continuous grain growth at the interface, as validated by Lee et al.8 through the structural analysis of pentacene films on patterned graphene electrodes. The growth of pentacene grain is not restricted because the thickness of a graphene electrode is less than 1 nm and its surface roughness is lower (< 0.9 nm). As a result, the pentacene grown on a graphene electrode/channel interface moves continuously toward the same direction although the morphology and grain sizes on the electrode and channel regions are not identical. No discontinuity is observed between the transition regions during pentacene growth. Previous studies have exhibited that pentacene molecules lie horizontally on the piconjugated monolayer carbon/graphene surface.30 Recently, Zhu et al. presented SEM studies to establish excellent graphene/pentacene interface contact and provide a possible explanation for the low hole-injection barrier between the 4 | Journal Name, [year], [vol], 00–00

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graphene electrode and pentacene layers.21 The semiconductor layer of the pentacene deposited by vacuum deposition has a naturally larger grain size than that of the TIPS-pentacene dropcasted through a solution process.

Figure 4. (a) Raman spectra of the monolayer graphene film transferred from the CVD growth Cu foil to the SiO2/Si substrate. (b) Raman spectra of the patterned monolayer graphene S-D electrode after conventional lithography/O2 plasma reactive ion etching/lift-off. The peak intensity values of ID/IG in the two cases were less than 0.3, which denote a monolayer graphene film.

Figures 4(a) and 4(b) show the Raman spectroscopy of a single-layer graphene film after the polymer-supported transfer of graphene on a SiO2/Si substrate, and the patterned graphene film after O2 plasma etching/removal of the photoresist through acetone, respectively. Raman spectroscopy is a simple and efficient method for determining the thickness of the layer and the quality of the graphene. A Jobin Yvon LabRam HR This journal is © The Royal Society of Chemistry [year]

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spectrometer with a 532 nm solid-state laser was used as the excitation light source. The spatial resolution of the beam spot was approximately 1 μm. The laser light beam was defocused from the surface of the graphene film to avoid thermal damage of the graphene film or the growth in intensity of the D-band. Notable characteristics of the Raman spectrum of the graphene film are a D-band at 1350 1/cm, a G-band at 1580 1/cm, and a 2D line at 2675 1/cm. The G-band at 1583 1/cm corresponds to the in-plane stretching vibration mode E2g of a well-crystallized graphene.31 The D-band arises from the disordered or defective structure of graphene, the microscopic defects of which can be determined by the intensity of the D-band.32-34 A defect-free graphene does not have a D-band. The intensity ratio of the Dband to the G-band (ID/IG) is frequently used to estimate the amount of defects in C materials.35,36 Therefore, a graphene film with less than 0.3 ratio is considered free from defects and has good quality. The respective ID/IG values are ~0.21 and 0.23 for the transferred graphene film and patterned graphene film (after lithography, O2 plasma etching, and photoresist removal), respectively. The quality of the single layer graphene film does not degrade after lithography because the intensity peak value ratio is lowers than 0.3.

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Figure 5. The results of XRD spectroscopy of different semiconductor layers. (a) The 1 wt% TIPS-pentacene drop-casted from a tetralin solvent through solution process on bare SiO2 surface. (b) The 65 nmthick pentacene films thermally evaporated under vacuum conditions on bare SiO2 surface.

Figures 5(a) and 5(b) show the grazing-incidence (GI) X-ray diffraction (XRD) pattern of pentacene films and TIPS-pentacene deposited by drop-casting and thermal evaporation, respectively. The results of XRD analysis show satisfactory molecular ordering for both types of film deposition techniques. The XRD curve exhibits strong (001) type reflections and other preferential orientations at (002) and (003) directions, which agree well with previous results.37 Figures 6(a) and 6(b) show the total resistance Rtotal for devices based on Au and graphene electrodes at a given Vg obtained by transmission line measurement (TLM), respectively. The channel width is 1500 μm, and the channel length ranges from 100 μm to 300 μm. The contact resistance, as a function of Vg, was then calculated. Figure 6(c) displays the normalized contact resistances of pentacene/graphene and pentacene/gold devices. The contact resistance of graphene electrode, normalized by the channel width, decreased from 0.5 MΩcm to 0.04 MΩcm as Vg varied from –30 V to –100 V. By contrast, the estimated contact resistance of Au electrode at a given Vg varying from 0.55 MΩcm to 3.45 MΩcm exceeded that of the graphene electrode by one order of magnitude. Figure 6(d) shows the channel lengthdependent field-effect mobilities of graphene- and Au-based devices. The bottom-contact pentacene field-effect transistors (FETs) based on graphene S-D electrode had an average fieldeffect mobility of 0.1±23% cm2V−1s−1. By contrast, the fieldeffect mobility of FETs using thermally evaporated Au electrodes

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Figure 6. Channel width-normalized Rtotal of pentacene OTFTs with (a) Au electrodes and (b) graphene electrodes. (c) Channel widthnormalized contact resistance between graphene/pentacene and Au/pentacene electrodes by TLM estimation. (d) Channel lengthdependent field-effect mobilities of graphene- and Au-based devices.

was 0.01±1% cm2V−1s−1. A series of TIPS-pentacene and pentacene-based OTFTs with bottom-contact geometry was fabricated on a highly doped Si wafer with a 300 nm SiO2 dielectric layer. The electronic performance of monolayer graphene S-D OTFTs were compared with those of Au S-D OTFTs. Figures 7(a), 7(b), 7(c), and 7(d) show the output characteristics (Ids − Vds) of the device (W/L = 1500 μm/150 μm) TIPS-pentacene channel with graphene S-D contact layer (T1), TIPS-pentacene with Au S-D contact layer (T2), pentacene with graphene S-D contact layer (T3), and pentacene with Au S-D contact layer (T4), respectively. The devices demonstrated the characteristics of typical p-channel thin film transistors. The output curves and maximum saturation drain currents of the T1, T2, T3, and T4 devices were 6, 0.75, 11, and 2 μA, respectively, and were obtained at Vg = Vd = −60 V. The fabricated devices with graphene S-D electrode (T3) exhibited a higher Vgs variation of up to −100 V compared with that of the devices with Au S-D contact (T4). The output curves illustrated in Figure 7 indicate the absence of a nonlinear current (Ids) increase at low drain-source biases (Vds). This lack of nonlinear behavior indicates an ideal ohmic contact existing between the graphene and pentacene layers. Figures 7(e), 7(f), 7(g), and 7(h) indicate the transfer characteristics (Ids − Vgs) of the corresponding devices. Fieldeffect mobility and threshold voltage (Vth) were calculated by fitting a straight line to the plot of the square root of Ids versus the Vgs curve. The field-effect mobility μsat of the devices was estimated from the saturation region by Eq. (1): Ids = (CiμsatW)/2L(Vgs − Vth)2 for Vds > Vgs − Vth,

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0.014 cm2V−1s−1 for F16CuPc).17 The mobilities for pentacene with Au S-D contact OTFTs were of the same order of magnitude (0.02 cm2V−1s−1).8 We observed that even when pentacene was not spherical or a long polymer, it still exhibited better performance than polymer OTFTs. Pentacene deposited on graphene electrodes with residues experienced 3D growth, as illustrated in the AFM images in Figures 3(p) and 3(r). This growth mode is commonly observed on dielectric substrates with low surface energy on which molecule–substrate interactions are relatively weak.38 Similar phenomena were also TABLE I

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Figure 7. Electrical properties of OTFTs on an SiO 2/Si substrate: (a) TIPS-pentacene with monolayer graphene electrodes, (b) TIPSpentacene with Au electrodes, (c) pentacene with monolayer graphene electrodes, and (d) pentacene with Au electrode. Transfer characteristics of OTFTs at S-D bias: Vds = −60 V (e) TIPS-pentacene with monolayer graphene electrodes, (f) TIPS-pentacene with Au electrodes, (g) pentacene with monolayer graphene electrodes, and (h) pentacene with Au electrode. The device dimension is W/L = 1500 μm /150 μm.

voltage swing (S), defined by the voltage required to increase the drain current by a factor of 10, is calculated by S = dVgs/d(logIds), where S indicates the maximum slope in the transfer curve. The sub-threshold swing of T1, T2, T3, and T4 devices were S = 4.5, 7, 3.5, and 8 V/decade, respectively. The obtained field effect mobilities of T1, T2, T3, and T4 devices were 4 × 10−2, 4 × 10−3, 1 × 10−1, and 1 × 10−2 cm2V−1s−1, respectively, at a constant Vds = −60 V, averaged over 12 devices. The proposed pentacene with graphene S-D electrode OTFTs displayed slightly lower mobilities than the recently reported values of 0.3 for L at ~100 μm and 0.47 to 0.53 cm2V−1s−1 for L at ~50 μm.8,21 More optimization of solution processing and clean graphene transfer process could improve the mobility of OTFTs. The mobilities for conjugated polymer and F16CuPc OTFTs were lower in value, as those reported in literature (μ ~0.04 for P3HT, 0.01453 for PQTBTz-C12, and 6 | Journal Name, [year], [vol], 00–00

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observed by Becerril et al., wherein average OTFTs mobility was enhanced 17 times in RGO than in gold for pentacene and F16CuPc, whereas the value was only a factor of ~9 times higher in RGO for the conjugated polymer.17 This result may be related to the formation of an easily ordered domain by small molecules compared with the larger molecules of a conjugated polymer, which can form amorphous films, and which can be less sensitive to the graphene electrode surface. The pentacene OTFTs (T3) exhibited 2.5 times higher μsat than the TIPS-pentacene (T1) fabricated by drop- casting. The same pentacene device (T1) exhibited onefold higher mobility than those of devices fabricated with Au S-D contact (T2). However, the solution-processed TIPSpentacene OTFTs required further low-temperature vacuum annealing steps after drop-casting of the semiconductor layer. Annealing could improve adhesion of the ohmic contacts or the bonding of the TIPS-pentacene with the graphene layer. It is believed that the improvement in Ids and μsat was attributed to the good crystallinity of the grown pentacene channel layer and the less contact barrier between pentacene-graphene compared with that of the solution process of the TIPS pentacene-graphene S-D. The on–off ratio of T1, T2, T3, and T4 devices were 104, 103, 105, and 104 with threshold voltages of 4.5, 3, –10, and −2 V, respectively. Table 1 lists the comparison of key parameters for graphene-based and Au-based OTFTs for solution-processed TIPS pentacene and thermally deposited pentacene devices. The currents, mobilities, and Ion-Ioff ratios for each case were higher for graphene electrode devices than for gold electrode devices. Therefore, graphene electrodes exhibited minimal contact resistance which enhanced hole injection. This finding confirmed the potential of replacing expensive Au electrodes. The performance of graphene electrodes is consistent, and even better, than those previously reported on graphene S-D electrodes.17,39,40 Figures 8(a and d), and 8(c and f) show the cross-sectional SEM images of pentacene film grown on a graphene and SiO 2 surfaces, respectively. The images show closely packed grains of organic semiconductors with good interconnectivity. Figures 8(b) and 8(e) shows that the continuous growth and pentacene matched crystallographic orientations of pentacene film on the interface of graphene/SiO2 surface caused a decrease in contact This journal is © The Royal Society of Chemistry [year]

Physical Chemistry Chemical Physics Accepted Manuscript

where Ids is the drain current; Vgs is the gate voltage; Vth is the threshold voltage; W and L are the channel width and length; and Ci is the capacitance per unit area of the gate insulator. The gate

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Figure 8. The cross-sectional SEM image of (a, d) pentacene layer deposited on a graphene surface and (b, e) pentacene layer on the interface of a graphene electrode/ SiO2 surface. The dotted line shows both sides of the pentacene grown on graphene electrode/SiO2 surface, and (c, f) pentacene layer deposited on bare SiO 2 surface. The HRTEM image of (g) pentacene layer deposited on a graphene layer (inset shows two to three layers of graphene) and (h) pentacene layer on the interface of a graphene electrode/SiO2 surface (L and R indicates the left and right sides of pentacene deposited on the interface between the graphene electrode and the SiO 2 surface, respectively). A 30 nm region showing the photoresist residue at the interface during lift-off by acetone, and (i) the pentacene layer deposited on bare SiO2 surface. graphene electrode with inevitably

resistance, which could be beneficial for enhancing the performance of OTFTs. The injected charge carriers could easily pass through the channel region. The physisorbed PMMA polymer residue on the graphene surface influences crystallographic size, whereas orientations of pentacene film determine the injection and transport of charge carriers.41 Previous XRD (2D GIXRD) analyses of pentacene films on a physisorbed PMMA residues led to an edge-on molecular arrangement in which the (001) surface with the lowest surface energy was parallel to the substrate.8,42 Dual-beam focused ion beam (FEI Nova-200 nanolab compatible) system used a finely focused beam of Ga ions, which allowed milling of small holes in the sample at well-localized sites to obtain cross-sectional images of the structure. The HR-TEM image [Figure 8(h)] shows the pentacene film on the interface of the graphene electrode and the SiO2 channel layer. The strong interaction between graphene and pentacene can result in excellent interface contact. The inset in Figure 8(g) shows that the graphene has two to three layers of thickness. We assumed that the purchased graphene, which was prepared by CVD processing, are predominantly monolayer; however, a possibility that two to three layers grew on Cu foil exists. Finally, Table 2 shows the performance comparison of recently published graphene/reduced graphene oxide S-D electrode-related OTFTs. The measured mobilities of pentacene with graphene S-D electrode are similar to those reported in earlier studies. From these references we have realized few facts. For example, a P3HT-based OTFT with a patterned 60 nm thick graphene S-D electrode annealed at 1000 °C (conductivity is still low at 500 S cm-1) displays a higher mobility of 0.04 cm2V−1s−1 This journal is © The Royal Society of Chemistry [year]

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than an Au electrode with a mobility of 0.017 cm2V−1s−1.15 However, the performance of this OTFT degrades at a low annealing temperature of ~600 °C of the graphene films. A hole mobility of 0.003 cm2V−1s−1 was measured for a 20 nm-thick patterned graphene-contact device. In high temperature, photoresister has the probability to damage a patterned S-D even when other distinctive fabrication methods, such as using highquality, self-assembled monolayer (SAM) of octadecyltrimethoxysilane (OTS) as a sacrificial layer, are implied in the process. Di et al reported that pentacene-based OTFTs exhibit high saturation mobility from 0.47 cm2V−1s−1 to 0.53 cm2V−1s−1 at different channel lengths from 5 μm to 50 μm.21 This study avoided the transfer process through poly(methyl methacrylate) (PMMA). However in their process if an Au electrode is used, then forming graphene at 700 °C will be difficult because of the high melting point of Au. The roughness of an Au electrode is also high because of the large metal clusters that formed during the graphene development process. This characteristic can limit the possible application of graphene electrodes to organic solar cells and organic light-emitting diodes. Therefore, annealing at a high temperature can damage dielectric property and is not useful in flexible plastic substrate applications. However, Lee et al. recently achieved a significant improvement in mobility of up to a μsat of ~0.3 cm2V−1s−1 at a Vds of approximately –80 V after treating the surface of SiO2 with hexamethyldisiloxane (HMDS) for pentacene-based OTFTs with a monolayer graphene S-D electrode.8 Moreover, the pentacene deposited RGO forms a domain with less order compared with pristine graphene because of the higher surface roughness of RGO, and the interaction between the π electron and pentacene causes several molecules to tilt.17 Large-scale processing of graphene is difficult because this material is insoluble and does not sublime. However, graphene oxide is a water-soluble nanomaterial that can be deposited in water suspensions and has been used for fabricating paper-like films with excellent mechanical properties.43 Though, the synthesis of either graphene oxide or reduced graphene oxide requires high temperature fabrication process. The failure mode of organic devices were observed by measuring the electrical properties of TIPS-pentacene and Journal Name, [year], [vol], 00–00 | 7

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pentacene with graphene S-D transistors after six months, as shown in Figure 9. The on–off ratio and mobilities in both transistors were degraded one order of magnitude compared with the previous measurements (Fig. 7). However, those in the transistors with Au S-D electrode degraded completely. No extra encapsulation for hermetic protection against water and air was taken, and all transistors were simply stored in ambient air inside a clean room. Therefore, we infer that the strong chemical stability of graphene electrode minimized device lifetime and indicated less ohmic degradation. The TIPS-pentacene or pentacene layers deposited on bare SiO2 substrate are highly hydrophilic in nature. These layers may not be ideal for fabricating OTFTs because of their tendency to absorb moisture. Therefore, further studies should be conducted to modify bare SiO2 surface through HMDS or OTS treatment and achieve hydrophobicity similar to those conducted in previous studies.44 SAMs with modified gold electrodes have lower contact resistances because of their different surface dipoles and energies. Further attention should be directed in improving the crystallinity and grain size of TIPS-pentacene. This improvement consequently enhances the performance of OTFTs through the solution process. The mobility of OTFTs correlates well with the molecular ordering of semiconductor layers. Therefore, controlling the deposition techniques and properly choosing a solvent with a high boiling point can enhance the performance of OTFTs through the solution process. Most importantly, several findings indicate the following phenomena. (1) Contaminants can occur during Cu etching, and thus, the surface must be clean to enhance the performance of a graphenebased device. (2) Small nanoparticles originated from the graphene growth process, and thus, an optimized (crackless and continuous) CVD graphene growth process is essential. (3) Annealing helps remove PMMA residue. (4) Instead of PMMA, poly (bisphenol A carbonate) can efficiently transfer the graphene, which can remove organic residues. Therefore, an optimized CVD graphene growth procedure and the modified RCA cleaning method can probably increase graphene-based device yields significantly. So we believe that the performance of BC OTFTs could be further improved.

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Conclusions TIPS-pentacene and pentacene-based OTFTs with monolayer graphene S-D electrodes were demonstrated. A CVDgrown graphene film on a Cu foil using a simple PMMA-assisted process was transferred and patterned. The performance of the TIPS-pentacene with graphene S-D electrodes was compared with that of a TIPS-pentacene with Au S-D electrode. The vacuum-deposited pentacene-based OTFTs with graphene electrode displayed better device performance than the TIPS pentacene-based graphene electrodes that underwent solution process deposition through drop-casting. The S-D graphene electrode had a low barrier energy and contact resistance because of less thickness, which facilitated easy transfer of the electron from the graphene to the channel region over a metal electrode. The pentacene-based graphene electrodes could achieve a higher mobility of 0.1 cm2V−1s−1 than the Au-based device. The solution-processed TIPS pentacene with gold electrode OTFTs (0.004 cm2V−1s−1) exhibited a onefold lower mobility than the TIPS pentacene with graphene electrodes (0.04 cm2V−1s−1). A monolayer graphene with high carrier injection efficiency, air stability, and good interface properties with organic semiconductors offers several potential advantages over traditional transparent electrodes. We are currently attempting to optimize the graphene transfer method to enhance the overall efficiency of the device. This alternative material to gold electrodes can improve the performance of OTFTs in next generation transparent electronic devices. Therefore, our results demonstrate a complete and systematic interface study of pentacene at the boundary between bare SiO2 and graphene electrode which offers lower injection barrier from the graphene to the channel. The cross-sectional SEM image illustrates a uniform closely packed pentacene grain distribution on graphene electrode which facilitates higher carrier injection in organic semiconductors. ACKNOWLEDGEMENTS This work was supported in part by the National Science Council of Taiwan under Contracts NSC101- 2218-E-006-006, NSC1022221-E-006-243 and NSC98-2221-E-006-213-MY3.

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Figure 9. Electrical characteristics of (a) TIPS-pentacene with graphene electrodes and (c) pentacene with graphene electrodes. The transfer curves of (b) TIPS-pentacene with graphene electrodes and (d) pentacene with graphene electrodes. All measurements were taken after six months. The field-effect mobility (μ) of pentacenebased OTFTs degraded 1.7 times, whereas that of TIPS-pentacene-

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Graphene-based electrodes for enhanced organic thin film transistors based on pentacene.

This paper presents 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene) and pentacene-based organic thin film transistors (OTFTs) with monola...
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