micromachines Article

A 0.026 mm2 Time Domain CMOS Temperature Sensor with Simple Current Source Sangwoo Park and Sangjin Byun * Division of Electronics and Electrical Engineering, Dongguk University, Seoul 04620, Korea; [email protected] * Correspondence: [email protected]; Tel.: +82-2-2260-3331 Received: 1 September 2020; Accepted: 25 September 2020; Published: 28 September 2020







Abstract: This paper presents a time domain CMOS temperature sensor with a simple current source. This sensor chip only occupies a small active die area of 0.026 mm2 because it adopts a simple current source consisting of an n-type poly resistor and a PMOS transistor and a simple current controlled oscillator consisting of three current starved inverter delay cells. Although this current source is based on a simple architecture, it has better temperature linearity than the conventional approach that generates a temperature-dependent current through a poly resistor using a feedback loop. This temperature sensor is designed in a 0.18 µm 1P6M CMOS process. In the post-layout simulations, the temperature error was measured within a range from −1.0 to +0.7 ◦ C over the temperature range of 0 to 100 ◦ C after two point calibration was carried out at 20 and 80 ◦ C, respectively. The temperature resolution was set as 0.32 ◦ C and the temperature to digital conversion rate was 50 kHz. The energy efficiency is 1.4 nJ/sample and the supply voltage sensitivity is 0.077 ◦ C/mV at 27 ◦ C while the supply voltage varies from 1.65 to 1.95 V. Keywords: temperature sensor; time domain; threshold voltage; poly resistor; temperature error; CMOS integrated circuits

1. Introduction Due to their small form factor, low power consumption, low cost and convenient digital interface capability, integrated temperature sensor chips have been widely used for thermal monitoring in various smart applications such as the smart farm, smart factory, smart health, and so on. Integrated temperature sensor chips can be implemented in various ways depending on the sensing element which is generally chosen from the threshold voltage, mobility, resistance or thermal voltage; the measured signal type, which is generally chosen from the voltage, current, frequency, or delay time; and the overall architecture which is basically determined by the chosen sensing element and the measured signal type [1–30]. Among the possible architectures, a time domain architecture based on frequency or delay time is promising because it can benefit from the recent trend that time resolution is being increased while voltage resolution is being decreased as the CMOS channel length and the supply voltage are scaled down. By measuring time domain signals such as the clock frequency, clock period or delay time, an efficient estimate of the current temperature can be obtained [1–20]. The sensing element can be chosen from the mobility, threshold voltage or resistance. Depending on the choice, the temperature linearity of a time domain CMOS temperature sensor is fundamentally limited by the temperature linearity of the chosen sensing element. In this paper, we present a time domain CMOS temperature sensor with the sensing element dependent on both the resistance of an n-type poly resistor and the threshold voltage of a PMOS transistor at the same time. By adopting this simple current source as a sensing element, we gain the ability to multiply two different types of temperature characteristics of

Micromachines 2020, 11, 899; doi:10.3390/mi11100899

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the resistance of an n-type poly resistor and the threshold voltage of a PMOS transistor by each other the resistance of an n-type poly resistor and the threshold voltage of a PMOS transistor by each other and improve the temperature linearity of the temperature sensor. and improve the temperature linearity of the temperature sensor. This paper is organized as follows. In Section 2, we explain how this simple current source can This paper is organized as follows. In Section 2, we explain how this simple current source can have better temperature linearity than the conventional approach. Section 3 describes the architecture have better temperature linearity than the conventional approach. Section 3 describes the architecture and schematics of the implemented time domain CMOS temperature sensor adopting the simple and schematics of the implemented time domain CMOS temperature sensor adopting the simple current source. Section 4 shows the simulation results and the performance comparison with the current source. Section 4 shows the simulation results and the performance comparison with the previous works found in literature. Finally, the conclusion is given in Section 5. previous works found in literature. Finally, the conclusion is given in Section 5. 2. Temperature Linearity of the Sensing Element 2. Temperature Linearity of the Sensing Element Figure 1 shows the conventional current source based on a single n-type poly resistor [1,8,9,13]. Figure shows the conventional current source based on a single n-type resistor [1,8,9,13]. It consists of 1multiple diode-connected PMOS transistors between VDD and thepoly ground, a differential It consists of multiple diode-connected transistors between and transistor. the ground, a differential input to a single-ended output amplifier, PMOS an n-type poly resistor and V a DD PMOS Since multiple input to a single-ended output amplifier, an n-type poly resistor and a PMOS transistor. Since diode-connected PMOS transistors generate a reference voltage, VREF , it is applied across the n-type multiple diode-connected PMOS transistors generate a reference voltage, VREF , it is applied across the poly resistor, RN (T), through the feedback loop consisting of the differential amplifier and the PMOS n-type poly resistor, R N(T), through the feedback loop consisting of the differential amplifier and the transistor as shown in the below figure. The reference current, I(T), becomes exactly proportional to transistor as shown in the below figure. The reference current, I(T), becomes exactly VPMOS REF and inversely proportional to RN (T) as follows. This current source has been used because its proportionallinearity to VREF and proportional RN(T) This current hasand been used temperature can inversely be made dependent on to only thatasoffollows. the resistor; then thesource analysis design because its temperature linearity can be made dependent on only that of the resistor; then the analysis become simpler than for the other types of current sources. and design become simpler than for the other types of current sources. V I(T) = V REF (1) I(T) = RN (T) (1) R (T)

Figure 1. The conventional approach for generating a temperature-dependent current through a poly Figure using 1. The aconventional approach for generating a temperature-dependent current through a poly resistor feedback loop. resistor using a feedback loop.

Figure 2 shows the temperature-dependent variation and temperature linearity error of RN (T) Figure shows the temperature-dependent variation andn-type temperature linearity RN(T) and 1/R where RN (T) is the resistance of the poly resistor. In error these of figures, N (T),2respectively, ◦ C and andvalues 1/RN(T), where R N (T) is the resistance of the n-type poly resistor. In these figures, the of Rrespectively, (T) and 1/R (T) were normalized with respect to the values measured at 25 the N N ◦ the values of R N (T) and 1/R N (T) were normalized with respect to the values measured at 25 °C and temperature linearity error is defined as the temperature deviation, which is measured in C, from the the temperature errorSince is defined temperature deviation, which measured inupward, °C, from linear fit of RN (T)linearity or 1/RN (T). RN (T)as isthe convex downward whereas 1/RNis(T) is convex the linear of RN(T)as or 1/RN(T). Since RN(T) is convex downward whereas 1/RN(T) is convex upward, they can befitmodeled they can be modeled as h i RN (T) = RN (25) × 1 − a(T − 25) + b(T − 25)2 (2) (2) R (T) = R (25) × 1 − a(T − 25) + b(T − 25) and and

h i 1 1 2 ( ) ( ) = × 1 + α T − 25 − β T − 25 1( ) RN (1T) = RN 25 × 1 + (T − 25) − (T − 25) R (T) R (25)

(3) (3)

where a, b, α and β are positive first and second order temperature coefficients of RN(T) and 1/RN(T), respectively. Here, RN(25) is the resistance of the n-type poly resistor measured at 25 °C. As shown in

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where a, b, α and β are positive first and second order temperature coefficients of RN (T) and 1/RN (T), 3 of 10 respectively. Here, RN (25) is the resistance of the n-type poly resistor measured at 25 ◦ C. As shown in Figure 2, the temperature linearity error varies from −2.60 to +2.87 ◦ C and from −0.79 to +0.83 ◦ C for Figure 2, the temperature linearity error varies from −2.60 to +2.87 °C and from −0.79 to +0.83 °C for R (T) and 1/R (T), respectively, over the temperature range of 0 to 100 ◦ C. This shows that 1/R (T) is RNN(T) and 1/RNN(T), respectively, over the temperature range of 0 to 100 °C. This shows that 1/RNN(T) is more linear against temperature variation than R (T) if they are implemented by using this CMOS more linear against temperature variation than RNN(T) if they are implemented by using this CMOS technology. Thus, in this work, we have chosen 1/R (T) as the sensing element and consequently I(T) technology. Thus, in this work, we have chosen 1/RNN(T) as the sensing element and consequently I(T) of (1) is now expressed as of (1) is now expressed as i h VVREF I(T) = = α(T−−25) 25)− − (T β(T− − 25) 25)2 ×× 11++(T I(T) (4)(4) (25) RRN(25) Micromachines 2020, 11, x

when ofof Figure 1 is1 used. Since the the temperature linearity errorerror of I(T) whenthe theconventional conventionalcurrent currentsource source Figure is used. Since temperature linearity of isI(T) limited by that of 1/R N (T) as implied in (4), we can expect that the temperature linearity of the is limited by that of 1/RN (T) as implied in (4), we can expect that the temperature linearity of temperature sensor willwill varyvary from −0.79 to +0.83 °C ◦ifC there is is not the temperature sensor from −0.79 to +0.83 if there notany anyother otherkind kindof of additional additional nonlinearity nonlinearity source. source.

(a)

(b) Figure 2. 2. The Thetemperature-dependent temperature-dependent variation and temperature linearity error of R (a) RNand (T) and Figure variation and temperature linearity error of (a) N(T) (b) (b) 1/R (T). 1/RN(T).N

Figure 33 shows shows the the simple simple current current source source adopted adopted alternatively alternatively in in this this time time domain domain CMOS CMOS Figure temperaturesensor. sensor. As Asshown shownin inthe thefigure, figure,ititjust justconsists consistsof ofan ann-type n-typepoly polyresistor, resistor, of of which which the the temperature resistance value is R (T), and a single diode-connected PMOS transistor. Since I(T) flows through the resistance value is RNN(T), and a single diode-connected PMOS transistor. Since I(T) flows through the n-type poly resistor and PMOS transistor, we can obtain the equation of I(T) by equating two current n-type poly resistor and PMOS transistor, we can obtain the equation of I(T) by equating two current equationsof of the the n-type n-type poly poly resistor resistor and and the the PMOS PMOS transistor transistor as as follows. follows. equations I(T) =

VDD − VSG (T) 1 W µ(T)COX (VSG (T) − VTH (T))2 = 2 L RN (T)

(5)

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Figure 3. The simple current source for generating a temperature-dependent current through a poly Figure 3. The simple current source for generating a temperature-dependent current through a poly resistor, with better temperature linearity. resistor, with better temperature linearity.

Then, VSG (T) is solved as

1 V − V (T) W (5) I(T) (T)= 2 (T)C L V (T) −−V (T) 1W = VSG (T) = VTH µ(T)COX L RN (T) R (T) r 2 (6) 1 Then, VSG(T) is solved as + VDD − VTH (T) + − (VDD − VTH (T))2 W µ(T)COX L RN (T) 1 V (T) = V (T) − W in the vicinity of the threshold voltage for low power Since the PMOS transistor operates (T)C R (T) consumption in this work, VSG (T) can be Lsimplified to VTH (T) and thus we obtain (6) 1 VDD − VTH (T) (T) + V − − V − V (T) (7) I(TV) ≈ + W (T) R ( ) R(T)C T N L whereSince the PMOS transistor operates in the vicinity of the threshold voltage for low power (T)simplified ) −VγTH(T = VTH (25to − and 25). thus we obtain (8) consumption in this work, VSG(T) V can (T) THbe

(T) V of − Here, γ is the positive temperature coefficient theV threshold voltage of the PMOS transistor and (7) I(T) ≈ ◦ (T) R VTH (25) is the threshold voltage measured at 25 C. I(T) can be finally obtained in quadratic equation form by substituting 1/RN (T) of (3) and VTH (T) of (8) into (7), as follows: where VDD −VTH (T) RN ( T )

(25= )+V ) − γ(T − 25). VDDV−VTH γ(T−25 (T) (25) × 1 + α(T − 25) − β(T − 25)2 RN (25)

(8) (9) h i Here, γ is the positive temperature of the PMOS transistor V −V (25)coefficient of the threshold voltage 2 ( ) ( ) ≈ DDR (TH × 1 + A T − 25 − B T − 25 N 25) measured at 25 °C. I(T) can be finally obtained in quadratic and VTH(25) is the threshold voltage equation form by substituting 1/RN(T) of (3) and VTH(T) of (8) into (7), as follows: where γ V − V (T) V − V (25) γ(T − 25) A=+ α+ (10) VDD − V×TH1(25 I(T) = + )(T − 25) − (T − 25) (T) (25) R R and αγ V − V B(25) = β− . (11) (9) × V 1 DD + A(T  (25)− B(T − 25) − V− TH25) R (25) Now let us compare (9) with (4) and observe the relative increase and decrease of A and B in where (10) and (11), respectively. We can see that A > α and B < β and that the temperature linearity of γ the amount of the improved temperature this simple current source has been fairly and A =improved α+ (10) − (25) V (25) linearity error is determined by α, β, γ and VDDV-VTH as indicated in (10) and (11). Contrary to the andconventional approach shown in Figure 1, the reference current, I(T), of (9) depends on both the resistance of an n-type poly resistor and the threshold voltage of a PMOS transistor at the same time and αγ =β− . (11) the temperature linearity error has beenBsuccessfully reduced V − V (25)as shown in Figure 4. The temperature ◦ ◦ linearity error of I(T) now varies from −0.40 to +0.38 C over the temperature range of 0 to 100 C. Now let us compare (9) with (4) and observe the relative increase and decrease of A and B in (10) and (11), respectively. We can see that A > α and B < β and that the temperature linearity of this simple current source has been fairly improved and the amount of the improved temperature linearity error is determined by α, β, γ and VDD-VTH(25) as indicated in (10) and (11). Contrary to the conventional approach shown in Figure 1, the reference current, I(T), of (9) depends on both the resistance of an nI(T)

=

h

i

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type poly resistor and the threshold voltage of a PMOS transistor at the same time and the type poly resistor and the threshold voltage of a PMOS transistor at the same time and the temperature linearity error has been successfully reduced as shown in Figure 4. The temperature temperature linearity error has been successfully reduced as shown in Figure 4. The temperature Micromachines 2020,of 11,I(T) 899 now varies from −0.40 to +0.38 °C over the temperature range of 0 to 100 5°C. of 10 linearity error linearity error of I(T) now varies from −0.40 to +0.38 °C over the temperature range of 0 to 100 °C.

Figure 4. The temperature-dependent variation and temperature linearity error of I(T). Figure 4. 4. The Thetemperature-dependent temperature-dependent variation variation and and temperature temperature linearity linearity error error of of I(T). Figure

Implementation 3.3.Implementation Implementation 3. 3.1.Architecture Architecture 3.1. 3.1. Architecture Figure55shows shows the the architecture architecture of the implemented Figure implemented time timedomain domainCMOS CMOStemperature temperaturesensor. sensor.It Figure 5 shows the architecture of the implemented time domain CMOS temperature sensor. It controlled oscillator oscillator(CCO), (CCO),an an11b 11bbinary binary Itconsists consistsofofthe thesimple simplecurrent current source, source, aa three three stage current controlled consists of the simple current source, a three stage current controlled oscillator (CCO), an 11b binary counterand andan anadditional additionaldigital digitallogic. logic. counter counter and an additional digital logic.

Figure Figure5.5.The Thearchitecture. architecture. Figure 5. The architecture.

The current source generates the temperature-dependent reference current, I(T), with improved The current source generates the temperature-dependent reference current, I(T), with improved temperature linearity which is fedthe to the CCO. The CCO generates the clock signal at the The current source generates temperature-dependent reference current, I(T),oscillating with improved temperature linearity which is fed to the CCO. The CCO generates the clock signal oscillating at the frequency of linearity f(T) which is linear with I(T).CCO. The logic circuitgenerates generatesthe theclock ENABLE whoseat pulse temperature which is fed to the The CCO signalpulse oscillating the frequency of f(T) which is linear with I(T). The logic circuit generates the ENABLE pulse whose pulse width equals onewhich clock period, ,I(T). of the external reference clock, CLK in the timing frequency of f(T) is linear1/f with The logic circuit generates the ENABLE pulse whose pulse REF REF . As shown width equals one clock period, 1/f REF, of the external reference clock, CLKREF. As shown in the timing diagram of Figure 6, theperiod, rising edges signal, CLKCCO , generated the CCO is counted width equals one clock 1/fREF, of ofthe theclock external reference clock, CLKREF.from As shown in the timing diagram of Figure 6, the rising edges of the clock signal, CLKCCO, generated from the CCO is counted by the 11b binary6,counter foredges the time duration of 1/fREF thefrom 11b digital output code, diagram of Figure the rising of the clock signal, CLKtoCCOgenerate , generated the CCO is counted by the 11b binary counter for the time duration of 1/f REF to generate the 11b digital output code, by the 11b binary counter for isthe duration of 1/fvalue REF toof generate the 11b digital output code, DATA[10:0]. The DATA[10:0] thetime quantized digital the temperature estimation function, DATA[10:0]. The DATA[10:0] is the quantized digital value of the temperature estimation function, DATA[10:0]. DATA[10:0] is the quantized digital value of the temperature estimation function, X(T), which isThe defined as X(T), which is defined as 1 X(T), which is defined as fREF (12) X(T) = 11 1 f(fT) X(T) =f (12) 1 X(T) = (12) 1 f(T) f(T)

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Figure Figure6.6.The Thetiming timingdiagram. diagram. Figure 6. The timing diagram.

InInthis regard to to thethe detailed definition of the estimation function, we thispaper, paper,in in regard detailed definition of temperature the temperature estimation function, Inand thisand paper, in regard detailed definition of the temperature estimation function, we introduced explained the 12 types of operational principles and thethe corresponding temperature we introduced explained theto 12the types of operational principles and corresponding temperature introduced and explained the 12 types of operational principlessensors and the from corresponding temperature estimation functions ofofthe domain CMOS temperature work estimation functions thetime time domain CMOS temperature sensors fromour ourprevious previous work[1]. [1]. estimation functions of the time domain CMOS temperature sensors from our previous work [1]. the Finally, totostart Finally,the theSTART STARTsignal signalenables enablesthe the11b 11bbinary binarycounter counterand andthe theadditional additionallogic logiccircuit circuit start the Finally, the START signal enables the 11b binary counter and the additional logic circuit to start the operation operationofofthis thistime timedomain domainCMOS CMOStemperature temperaturesensor. sensor. operation of this time domain CMOS temperature sensor.

3.2.Circuits Circuits 3.2.

3.2. Circuits

Figure shows theschematic schematic simple currentsource source and the CCO. Inthe thecurrent current source, Figure 7 7shows the ofofthe simple and the CCO. source, Figure 7 shows the schematic ofthe the simplecurrent current source and the CCO. InIn the current source, theresistance resistance the n-type poly resistor, (T), has hasbeen beendesigned designed externally tuned bythe the the ofofthe poly resistor, RRNRN (T), externally tuned by the resistance of n-type the n-type poly resistor, N(T),has been designed tototo bebebe externally tuned by the external digital control word, FREQ_CTRL[2:0]. Weadded addedthese these extra digital codes forrough rough external 3b3bdigital control word, FREQ_CTRL[2:0]. these extra digital codes external 3b digital control word, FREQ_CTRL[2:0].We We added extra 3b3b3b digital codes for for rough compensation of the severe process variation of RNof (T), rarelyrarely happens. If theIfresistance compensation ofprobable the probable severe process variation of R (T), the compensation of the probable severe process variation RNNwhich (T), which which rarelyhappens. happens. If the resistance of the n-type poly resistor, R N (T), is shifted too much from its typical value at the worst of the n-type poly resistor, tooshifted much too from its typical value at the worst corner, resistance of the n-type polyRresistor, RN(T), is much from its typical value at case the worst N (T), is shifted case power corner, the total power consumption thetotal totaltemperature temperature will affected much. the corner, total consumption of the total temperature sensor will sensor be affected much.too Thus, this 3b case the total power consumption ofofthe sensor willbetoo be affected too much. Thus, thistuning 3b rough digital tuning by FREQ_CTRL[2:0] is only necessary for robust operation and rough digital by FREQ_CTRL[2:0] is only necessary for robust operation and consistent Thus, this 3b rough digital tuning by FREQ_CTRL[2:0] is only necessary for robust operationpower and consistent power consumption and should be carried out before we execute the two point calibration. consumption and should be and carried outbe before weout execute two point Of course, consistent power consumption should carried beforethe we execute thecalibration. two point calibration. Of course, if the resistance of the n-type poly resistor can be accurately controlled during fabrication if course, the resistance of the n-type poly resistor be accurately controlledcontrolled during fabrication within the Of if the resistance of the n-type polycan resistor can be accurately during fabrication within the capability of normal two point calibration, FREQ_CTRL[2:0] needs not be additionally capability of normal of twonormal point calibration, FREQ_CTRL[2:0] needs not beneeds additionally within the capability two point calibration, FREQ_CTRL[2:0] not be implemented. additionally implemented. implemented.

Figure 7. The schematicofofthe thecurrent current source and thethe CCO (right side). Figure 7. The schematic source(left (leftside) side) and CCO (right side).

temperature-dependent referencecurrent, current, I(T), is delivered to each current starved inverter The The temperature-dependent I(T), delivered each current Figure 7. The schematicreference of the current source (leftisside) and theto CCO (right side).starved inverter type delay cell inside the CCO through two DC bias voltages, VBIASP and VBIASN, respectively. By type delay cell inside the CCO through two DC bias voltages, VBIASP and VBIASN , respectively. supplying the almost equivalent currents to the PMOS and the NMOS paths of the current starved By supplying the almost equivalent currents to the I(T), PMOS and the NMOS paths of the current starved The temperature-dependent current, isdelay delivered toeach each current inverter inverters, the low to high and reference high to low propagation times of delay cell starved can be made inverters, the low to high and high to low propagation delay times of each delay cell can be type delay cell inside the CCO through two DC bias voltages, V BIASP and V BIASN , respectively. By almost equal to each other. Because the propagation delay time, τ(T), of each delay cell is representedmade almost each other. Because the propagation delay time, of each delay cellcurrent is represented supplying the to almost equivalent currents to the PMOS and theτ(T), NMOS paths of the starvedas as equal

inverters, the low to high and high to low propagation delay times of each delay cell can be made V C almost equal to each other. Because the propagation delay τ(T) = DD × time, τ(T), of each delay cell is represented (13) 2 I(T) as

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τ(T) =

V C × I(T) 2

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(13)

the clock frequency, f(T), of of the the CCO CCO can can also also be be expressed expressed as as frequency, f(T), 1 1 I(T) I(T) f(T) = 1 × 1 = (14) ( ) f T = τ(T)× 2N = N × V × C (14) N × VDD × C τ(T) 2N where N is the number of total delay cells of the CCO, and f(T) is linear with I(T). Finally, the where N is theestimation number offunction, total delay cellsof ofthe thetemperature CCO, and f(T)sensor is linear I(T). Finally, the temperature X(T), canwith be represented as temperature estimation function, X(T), of the temperature sensor can be represented as V − V (25) (15) × 1h + A(T − 25) − B(T − 25) i X(T) = f × NV× C(× 25R) (25) DDV− V× TH 2 (15) X(T) = × 1 + A(T − 25) − B(T − 25) from (9), (12) and (14). fREF × N × VDD × C × RN (25) from (9), (12) and (14). 4. Performance 4. Performance The time domain CMOS temperature sensor was implemented in a 0.18 μm 1P6M CMOS process with The a general VTH. Figure 8 shows the diesensor photowas andimplemented the active dieinarea is 0.026 mm2.CMOS To theprocess best of time domain CMOS temperature a 0.18 µm 1P6M 2 is the smallest among the previously published 2 our knowledge, the die area of 0.026 mm with a general VTH . Figure 8 shows the die photo and the active die area is 0.026 mm . To the time best domain CMOS temperature sensors implemented insmallest 0.18 μm CMOS Figure 9 showstime the of our knowledge, the die area of 0.026 mm2 is the among technology. the previously published simulated temperature error over the temperature range of 0 to 100 °C after one point and two point domain CMOS temperature sensors implemented in 0.18 µm CMOS technology. Figure 9 shows the calibrations are carriederror out,over respectively. For the process corners, FS,and and SF,point the simulated temperature the temperature range of 0 to 100 ◦ C TT, afterFF, oneSS, point two temperature error varies from −2.33 to +1.99 °C after one point calibration at 50 °C and from −0.96 to calibrations are carried out, respectively. For the process corners, TT, FF, SS, FS, and SF, the temperature ◦ ◦ ◦ +0.66 °C after two point calibration at 20 and 80 °C, respectively. The temperature error of the time error varies from −2.33 to +1.99 C after one point calibration at 50 C and from −0.96 to +0.66 C ◦ C, respectively. domain temperature as being somewhat larger than the time temperature after twoCMOS point calibration at sensor 20 and is 80measured The temperature error of the domain linearity error of I(T) only, because the temperature linearity error of the load capacitance, C, error may CMOS temperature sensor is measured as being somewhat larger than the temperature linearity also affect the temperature estimation function, X(T), as can be seen from (15). Additionally, of I(T) only, because the temperature linearity error of the load capacitance, C, may also affect the the quantization error at the 11b digital code, the residue the process variation error temperature estimation function, X(T),output as can be seenDATA[10:0], from (15). Additionally, quantization error at after two point calibration, the approximation error of I(T) made for the derivation of (7), the charge the 11b digital output code, DATA[10:0], the residue process variation error after two point calibration, sharing effect within theofdelay cell and transistor mismatch effect between current mirrors may the approximation error I(T) made for the the derivation of (7), the charge sharing effect within the delay also be the ofmismatch additionaleffect contributions to the mirrors increasemay of the temperature The cell and the sources transistor between current alsototal be the sources of error. additional temperature error of Figure 9b has been measured greater than the temperature error of Figure 4. The contributions to the increase of the total temperature error. The temperature error of Figure 9b has been temperature resolution was set as 0.32error °C and the temperature to digital conversion measured greater than the temperature of Figure 4. The temperature resolution wasrate, set aswhich 0.32 ◦is C exactly equal to f REF in this design, is about 50 kHz. The energy efficiency is 1.4 nJ/sample and most and the temperature to digital conversion rate, which is exactly equal to fREF in this design, is about of power consumption is dissipated by the current source. shown in Figure 10,is the supply 50 the kHz. The energy efficiency is 1.4 nJ/sample and most of theAs power consumption dissipated voltage sensitivity is measured as in low as 0.077 °C/mV at 27voltage °C while VDD varies from 1.65 to by the current source. As shown Figure 10, the supply sensitivity is measured as 1.95 low V. as ◦ ◦ Table 1 compares the performances of this temperature sensor with those of the previous works in 0.077 C/mV at 27 C while VDD varies from 1.65 to 1.95 V. Table 1 compares the performances of literature. The previous works are all time domain CMOS temperature sensors which were this temperature sensor with those of the previous works in literature. The previous works are all implemented in CMOS processes with which the same channel length of 0.18with μm,the forsame fair time domain CMOS temperature sensors wereminimum implemented in CMOS processes performance comparison with this work. Compared to the previous works, we can see that this minimum channel length of 0.18 µm, for fair performance comparison with this work. Compared to temperature a relatively small die areasensor and has relatively small temperature error as the previous sensor works,occupies we can see that this temperature occupies a relatively small die area and shown in Table 1. has relatively small temperature error as shown in Table 1.

Figure 8. The die photo. Figure 8. The die photo.

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88of of10 10 8 of 10 error [ºC] error [ºC] 3

2

1

0

-1

-2

-3

3

2

FF FF

1

FS FS

SF SF

0

SS SS

TT TT

-1

-2

-3

0

0

10 20 30 40 50 60 70 80 90 100 10 20 30 40 50 60 70 80 90 100

temperature [ºC] temperature [ºC]

(a) (a)

(b) (b) Figure 9. The temperature error after (a) one point calibration at 50 °C and (b) two point calibration Figure9.9.The Thetemperature temperature error error after (a) one point C and Figure point calibration calibrationat at50 50◦°C and(b) (b)two twopoint pointcalibration calibrationat at 20 and 80 °C, carried out against the different process corners, TT, FF, FS SS,and FS and SF. process corners, TT, FF,FF, SS, SF.SF. at2020and and8080◦ C, °C,carried carriedout outagainst againstthe thedifferent different process corners, TT, SS, FS and

Figure is swept swept from from 1.65 1.65 to to 1.95 1.95 V. V. Figure10. 10.The TheVVDD DD sensitivity sensitivity when when V VDD DD is Figure 10. The VDD sensitivity when VDD is swept from 1.65 to 1.95 V.

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Table 1. The performance summary. Reference

[1]

[7]

[8]

[9]

[14]

This Work

CMOS technology Die area Supply voltage Temperature range Resolution Accuracy Conversion rate Energy efficiency VDD sensitivity

0.18 µm 0.432 mm2 1.8 V 0–100 ◦ C 0.49 ◦ C −1.6–0.6 ◦ C 25 kHz 7.2 nJ/sample 0.085 ◦ C/mV

0.18 µm 0.074 mm2 0.8 V −20–80 ◦ C 0.145 ◦ C −0.9–1.2 ◦ C 1.2 Hz 8.9 nJ/sample 0.0038 ◦ C/mV

0.18 µm 0.05 mm2 1.0 V 0–100 ◦ C 0.3 ◦ C −1.6–3.0 ◦ C 100 Hz 2.2 nJ/sample -

0.18 µm 0.09 mm2 1.2 V 0–100 ◦ C 0.3 ◦ C −1.4–1.5 ◦ C 33.3 Hz 2.2 nJ/sample 0.014 ◦ C/mV

0.18 µm 0.19 mm2 1.2 V −40–85 ◦ C 0.18 ◦ C −1.0–1.0 ◦ C 1kHz 66.5 nJ/sample -

0.18 µm 0.026 mm2 1.8 V 0–100 ◦ C 0.32 ◦ C −1.0–0.7 ◦ C 50 kHz 1.4 nJ/sample 0.077 ◦ C/mV

5. Conclusions We implemented a time domain CMOS temperature sensor alternatively adopting a simple current source consisting of an n-type poly resistor, a PMOS transistor and a simple three stage CCO. Although the current source is based on a simple architecture, it can generate a temperature-dependent reference current, I(T), which has better temperature linearity than the conventional approach because it can multiply two different temperature characteristics of the resistance of an n-type poly resistor and the threshold voltage of a PMOS transistor by each other. Consequently, we have successfully implemented a temperature sensor with a small die area and a small temperature error. Author Contributions: Conceptualization, S.B.; design, S.P.; validation, S.P.; writing, S.B. and S.P.; supervision, S.B.; funding acquisition, S.B. All authors have read and agreed to the published version of the manuscript. Funding: This research was supported by the Basic Science Research Program through the National Research Foundation of Korea (NRF), funded by the Ministry of Education (NRF-2017R1D1A1B03028325). Acknowledgments: The authors would like to thank the IC Design Education Center (IDEC), Daejeon, South Korea, for supporting the MPW and EDA tools. Conflicts of Interest: The authors declare no conflict of interest.

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