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IEEE TRANSACTIONS ON BIOMEDICAL ENGINEERING, VOL. 38, NO. I , JANUARY 1991

A Low-Noise Demultiplexing System for Active Multichannel Microelectrode Arrays Jin Ji, Member, IEEE, Khalil Najafi, Member, IEEE, and Kensall D. Wise, Fellow, IEEE

Abstract-This paper reports a low-noise demultiplexing system capable of reconstructing multichannel single-unit neural signals derived from multiplexed microelectrode arrays. The overall multiplexingdemultiplexing system realizes ten channels, a per-channel gain of 68 dB, a bandwidth from 100 Hz to 6 kHz, and an equivalent noise level (referred to the probe input) of 13 pV rms. It provides for signaling over the power supply to allow control of on-chip probe functions such as self-testing. The interchannel crosstalk is less than 3%, and switching noise is suppressed by blanking the transition intervals. The 200 kHz probe sample clock is tracked automatically over a range from 150 to 250 kHz. Neural signals as low as 20 yV (typically 640 yV at the demultiplexing system input) can be reconstructed. The overall system organization is compatible with the demuitiplexing of as many as 40 time-multiplexed electrode channels from a single probe data line.

INTRODUCTION ROGRESS in understanding the information-processing techniques used in neural structures depends in part on the development of improved instrumentation systems. Such systems should allow simultaneous multichannel single-unit recording from one-, two-, and three-dimensional electrode arrays capable of accurately sampling the neural activity throughout a volume of tissue. A similar situation exists for interfaces (both recording and stimulation) designed to allow the realization of advanced neural prostheses to aid the handicapped. Recently, a number of researchers have explored the feasibility of using planar microelectrode arrays fabricated using integrated-circuit process technology to extract such signals from neural tissue [1]-[4]. Planar passive arrays have been shown to couple tightly to neural tissue on an acute basis and record multichannel single units reliably [5]. Histology on probes implanted for periods of several months in guinea pig cortex, cochlear nucleus, and auditory nerve have shown minimal tissue reaction, making the chronic implantation of such structures appear feasible. Active probes containing integrated electronics for signal amplification and multiplexing have been reported recently [6] and have been used to record coftical units. The remaining barriers to chronically implantable multichannel electrode arrays are associated with the development of chronic lead structures capable of providing long-term insulation of the output conductors and minimal tethering between the probe and the percutaneous plug or intracranial telemetry platform. Silicon- and polyimide-based ribbon cables [7] as well as teflon-insulated discrete wires are being explored as possible solutions to these interconnect prob-

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Manuscript received December 2 2 , 1989; revised March 7, 1990. This work was supported by the Neural Prosthesis Program, National Institute of Neurological Disorders and Stroke, National Institutes of Health under Contract NIH-NINCDS-NO1-NS-4-2364. The authors are with the Center for Integrated Sensors and Circuits, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 48109. IEEE Log Number 9040625.

lems. Thus, we believe that chronic multidimensional microelectrode arrays for CNS recording and stimulation are close to realization. Given the ability to extract multichannel single-unit signals from neural systems, a second and in some ways still more formidable problem exists in the external world. The multiplexed signals must be recovered (demultiplexed and filtered) and then analyzed (on- or off-line) to establish circuit-system relationships from among the many recorded units. This paper reports a demultiplexing system capable of reconstructing as many as 40 channels of simultaneous neural data, thus providing the first link in this external signal-processing chain.

OVERALLSYSTEMORGANIZATION From the standpoint of implantable probe structures, the issues associated with physical probe size, possible tissue reaction, and tethering demand multiplexing to minimize the number of leads required from the probe. Three leads would appear the practical minimum for an active recording probe (power, data, and ground), and Fig. 1 shows such an interface. To allow signaling to the probe (e.g., to initiate marking, in vivo impedance checking, or other functions), it is possible to signal over the power line by momentarily pulsing its level. Perchannel amplifiers are used to boost the neural signals, which are then serially multiplexed onto a single output data line under control of an on-chip clock. Synchronization (framing) signals are placed on the output data line during an extra time slot to allow external reconstruction of the on-chip sample clock. Fig. 2 shows a tenchannel active probe on which such circuitry has been implemented [6]. The external system electronics must accomplish several functions: 1) it must provide stable bounce-free power to the probe, allowing multilevel signaling for setting or releasing special functions; 2) it must regenerate the sample clock from the synchronization signals over a broad range in frequency; and 3) it must demultiplex and reconstruct the recorded signals, removing any switching noise from the edges of the sample periods. It must accomplish these functions in a small batterypowered implementation and process multiplexed input signals as low as typically 1-2 mV (corresponding to a 20 pV peak neural signal) while realizing a 100 Hz-6 kHz per-channel bandwidth with interchannel crosstalk of less than 5 % . The circuitry reported here accomplishes these functions. Fig. 3 shows a block diagram of the overall demultiplexing system. The multiplexed input signal is amplified, and the synchronization signals are stripped off and used to drive a phaselocked loop (PLL), which regenerates the sample clock and drives an analog demultiplexer. A blanking circuit restricts the sampling time of the demultiplexer to the center of the sample period, avoiding the switching intervals. Per-channel active

0018-9294/91/0100-0075$01.00 0 1991 IEEE

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IEEE TRANSACTIONS ON BIOMEDICAL ENGINEERING, VOL. 38, NO. I , JANUARY 1991

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Fig. 1. A three-lead interface to an implantable multichannel probe. The data line incorporates synchronization (framing) pulses for reconstruction of the probe sampling clock. The power line can be pulsed to allow selftesting of the probe electronics and recording site impedances.

Fig. 2. SEM photographs of a ten-channel active recording probe with onchip E/D NMOS signal processing electronics. The overall probe is 4.7 mm long with a recording site separation in depth along the shank of 100

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JI et al. : DEMULTIPLEXING SYSTEM FOR MULTICHANNEL MICROELECTRODE ARRAYS

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output filters smooth and band-limit the reconstructed neural signals, which are then available for further processing and interpretation. CIRCUIT

DESIGNAND OPERATION

In order to maintain compatibility with the active probe design reported earlier [6], the present demultiplexing system has been designed for a 10-channel probe operating from a single 5 V supply. Power-supply signaling to initiate self-testing requires an 8 V pulse on the supply line, while deselection of this function requires that the power supply drop to less than 3 V. The neural signals are assumed to be multiplexed at a nominal clock frequency of 200 kHz, consistent with a sample time of 5 ps, a frame time of 55 ps, and a per-channel bandwidth in excess of 6 kHz. For a nominal probe gain of 30, the anticipated input signal range to the probe (20 pV to about 600 pV) is equivalent to 0.6-18 mV (peak) at the input to the demultiplexing system.

Clock Regeneration Regeneration of the clock signal generated on the probe itself is performed by three circuit blocks: a synchronization circuit, a phase-locked loop (including a voltage-controlled oscillator (VCO)), and a frequency divider. A diagram of the clock regeneration circuitry is shown in Fig. 4. The multiplexed multichannel probe output signal, which contains synchronization (framing) markers in an eleventh time slot, is amplified by a gain of 3 (1 / 2 LF353), and the framing marks are stripped off using a comparator (1 / 4 LM339). The comparator output signal, a sequence of pulses at the frame frequency, is converted by a J-K flip-flop (1/2 74LS109) to a 50% duty-cycle square wave at half the frame frequency (1/22 of the on-chip clock frequency). This square wave serves as one input to the PLL (CD4046). The other input to the PLL is the buffered (1/6 CD4050) output of the VCO (within the CD4046), whose frequency has been reduced by a factor of 22 by the frequency

divider circuit shown (74LS169, 1 / 6 74LS04, and 1/2 74LS109). When these two inputs are in phase, the VCO output is synchronized with the framing marks and, therefore, with the on-chip clock. The comparator circuit employs positive feedback (hysteresis) for fast switching edges. The threshold level of the comparator is controlled by a potentiometer (R24) which can be adjusted in test to a level consistent with the framing pulse amplitude from the probe. The capacitor and resistors for the VCO circuit (C3 1, R3 1, and R32) are set such that the VCO frequency is between 150 and 250 kHz (with C31 fixed, R32 sets the minimum VCO frequency, fmln, and R31 sets the VCO frequency range, fmax fmln). The frequency divider uses a fourbit presettable upldown counter (74LS169) for a simple and flexible design. The counter is preset to a dividing factor of 11 (one plus the number of signal channels ). It counts down from the preset number (1010)2 and reloads the setting when it reaches (OOOO),. The output of the counter is a sequence of pulses, which are converted to a 50% duty-cycle square wave by another .I-K flip-flop (1 /2 74LS 109).

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The Analog Switch

The analog switch circuit demultiplexes (redistributes) the sampled analog signals. Its block diagram is shown in Fig. 5 . It consists of a switch chip (AD7506), a channel-control (addressing) circuit (1/2 74LS123, 74LS10, and 74LS161), and a sample-window circuit 74LS123). The switch chip contains 16 analog switches, ten of which are used to connect the input signal to one of the ten output channels, depending on the 4-b address generated by the channel-control circuit. The switch sample time (when the switch is actually closed) is controlled by the chip enable signal generated by the sample-window circuit. The channel-control circuit is a four-bit counter (74LS161) set in a 0-10 counting mode. It is advanced by the synchronized clock and is reset to channel 0 on arrival of the synchronization marks to preserve the correct channel numbering. The window circuit is important in reducing the channel switching noise and

IEEE TRANSACTIONS ON BIOMEDICAL ENGINEERING, VOL. 38, NO. I. JANUARY 1991

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noise introduced by the fixed clock-phase error. The channel switching noise is a series of transient spikes at the beginning of each channel period. The sample-window delay is set to 1-2 ps to blank out these spikes. The fixed clock phase error is due to the finite ramp-up time of the synchronization marks and due to time delays (phase shift) in the clock regeneration circuit, although the clock is synchronized to the framing marks. With this fixed phase error, the address does not change exactly at the time the input signal channel changes. Therefore, a finite window (sample) delay is needed, and the window width needs to be narrowed as well. The window control circuit uses two monostable multivibrator circuits (74LS 123): one controls the window delay, and the other controls the window width. These times are set by two resistor-capacitor pairs (R71-C71 and R72C72, respectively).

Fig. 6 . The circuit diagram of the analog signal path in the demultiplexing system.

The Analog Signal Path

The analog signal path is shown in Fig. 6. The multiplexed analog signals go through the preamplifier, the analog switch, a per-channel amplifier and then an active low-pass filter. Control of the analog switch (AD7506) has been discussed; it is considered here only as a switch with a series resistance which represents the on-state of the switching device. After the signals are redistributed (demultiplexed), the high frequency components must be filtered out. Each individual signal is first smoothed by a sample/hold capacitor (C81) and is then amplified and further filtered by a monolithic sixth-order low-pass Buttenvorth filter (MF6-50). The upper cutoff frequency is about 6 kHz, which is controlled by setting the filter clock frequency to 300 kHz (using R84-C83). The lower cutoff frequency of the entire signal path is set by the ac coupling circuits (e.g., C11, C82) and is designed to be about 100 Hz. Therefore, the overall

passband is from 100 Hz to 6 kHz, which matches the typical spectrum of extracellular single-unit neural signals. This bandpass could be varied in the demultiplexing system by varying the components noted. Signaling over the Power Supply

The demultiplexing system uses commercial IC chips and discrete resistors and capacitors soldered onto Augat DIP headers. All of the circuitry fits on a single 8136-URG1 Augat wirewrap panel. The entire demultiplexing system fits in a chassis measuring 4 x 9 x 1 1 in. Two gel/cell rechargeable batteries (GC1215-1) are used as the system power source, with + 5 V (LM7805) and - 5 V (LM7905) regulators used for the demultiplexer circuitry. A bounce-free variable regulator + 5 V / + 8 V (LM317) is used to supply power and signaling to the

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JI et al. : DEMULTIPLEXING SYSTEM FOR MULTICHANNEL MICROELECTRODE ARRAYS

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Fig. 7 . Circuit diagram of the power supply and its test signaling circuitry.

probe. This regulator and a debounced electronic “probe power” switch are shown in Fig. 7. The regulator output voltage is controlled by resistors R91 and R92 as VOoutput = 1.25

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Fig. 8. Photomicrograph of the E/D NMOS probe circuitry for amplification and multiplexing of neural signals. This circuitry is realized here with input pads to facilitate testing of the demultiplexing system. The die size is 1 . 1 X 1 . 1 mm with a power dissipation of about 5 m W from a single 5 v supply.

TEST RESULTS Fig. 8 shows the integrated probe “front-end’’ circuitry used for test measurements of the demultiplexing system. This frontend circuitry is identical to that on the actual probes except that input pads are used for signal input instead of direct inputs from integrated recording sites. Thus, test input signals can be supplied in place of neural signals, and recording site noise (which might mask circuit noise) is avoided. Fig. 9 shows the voltage gain of the combined system as a function of frequency; the 3 dB bandwidth is 6 kHz while the total gain is 68 dB, with a nominal 30 dB gain here for the probe electronics and a 38 dB gain for the external demultiplexing electronics. The system is able to reproduce signals as small as 20 pV. Fig. 10 shows the overall input and output signals for the multiplexing-demultiplexing system for peak input signals of 500 and 50 pV, while Fig. 11 shows the measured equivalent system noise voltage referred to the probe input. Integrated over a 100 Hz to 10 kHz recording bandwidth, this noise level is equivalent to 13.2 pV rms, which is comparable to the noise of the electrode recording site itself. This noise level is set by the low-frequency 1/f noise of the probe electronics. Without the probe circuitry, the average equivalent input noise level for the demultiplexing system alone is about 40 nV/& (100 Hz-10 kHz), so that the noise contribution of the demultiplexing circuitry is negligible in determining the system noise level. Fig. 12 shows the multiplexed input framing signal at the input to the demultiplexing system with all probe input channels grounded. Due to on-chip cancellation of switching transients, multiplexer noise with this probe circuitry is negligible. A diagram of the overall multiplexed input waveform is also presented, illustrating the blanking of the multiplexer switching transitions, and the reshaped data signal and multiplexer switch enable pulses in the demultiplexing system are shown. Fig. 13 shows the measured system crosstalk as a function of frequency. The equivalent crosstalk is less than 3 % over nearly

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all of the frequency band. For a 500 pV input spike amplitude, the crosstalk into other channels is thus less than 15 pV, which is comparable to the background neural and thermal noise experienced in most single-unit recording situations. While the present system handles ten recording channels, this is not an upper limit. Studies have shown that as many as 40 channels of information could be handled with this general approach, at which point the PLL operating frequency, the input amplifier gain-bandwidth product, and the internal logic delays all become limiting, forcing a reduction in the per-channel sampling rate and channel bandwidth. This system is also being extended for use with a second-generation active probe [8] in which the probe data lead is used for bidirectional signaling. Spike thresholding/counting as well as a bidirectional computer-controlled probe interface have been added to the demultiplexing unit. This extension is built around the existing system, with the critical performance parameters unaltered from those reported here.

IEEE TRANSACTIONS ON BIOMEDICAL ENGINEERING. VOL. 38. NO. I . JANUARY 1991

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Fig. 10. Simulated single-unit input waveform (top traces) and demultiplexed output waveform (bottom traces) for the complete multiplexdemultiplex system.

Frequency, Hz

Fig. 11. Equivalent input noise of the multiplexing-demultiplexing system as a function of frequency. The integrated input noise voltage over the 100 Hz to 10 kHz frequency band is equivalent to about 13 p V rms.

Fig. 12. Waveforms of the multiplexed input data to the demultiplexing system. The top photo shows the input signal from the probe electronics (at two different amplifications) with all data channels grounded. Switching noise from the probe multiplexer is effectively canceled. The diagram shows the overall structure of a data frame with an expanded view of the switchenable pulse and the channel data pulse, showing the centering of the sampling interval. The lower photo shows the input signal to the demultiplexer switch with the 2 ps switch enable pulses in the lower trace. The pulse in the upper trace is the frame signal (the small high-frequency spikes coincident with the switch-enable transitions are measurement artifact).

SUMMARY A low-noise demultiplexing system for use with multiplexed microelectrode recording arrays has been described. The system provides an important first step in defining electronics for the eventual processing/analysis of large numbers of simultaneous single-unit neural events derived from multidimensional recording arrays. Such analyses, in turn, should aid in developing a better understanding of information processing in neural systems and in the realization of several next-generation neural prostheses. The present system contains all circuitry necessary to reconstruct ten channels of single-unit data, handling input signals as low as 20 p V with an equivalent input noise level of about 13 p V rms and interchannel crosstalk less than 3%. The overall per-channel amplification provided by this unit is 68 dB

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Fig. 13. Measured system crosstalk as a function of frequency for the multiplexing-demultiplexing system.

JI er al.: DEMULTIPLEXING SYSTEM FOR MULTICHANNEL MICROELECTRODE ARRAYS

(38 d B f o r the demultiplexer alone), with a signal bandwidth from 100 Hz t o 6 kHz. W i t h a redesigned front-end c h i p f o r still l o w e r noise levels, similar demultiplexing systems might also be useful f o r processing o t h e r types of multichannel data ( e . g . , slow-wave potentials), recorded using large-area electrode arrays.

ACKNOWLEDGMENT The authors wish t o thank Y. Y a n g , W . Baer, a n d J. M o r g a n f o r their h e l p in t h e assembly and testing of the demultiplexing systems.

REFERENCES K. D. Wise, J. B. Angell, and A. Starr, “An integrated circuit approach to extracellular microelectrodes,” IEEE Trans. Biomed. Eng., vol. 17, pp. 238-247, July 1970. K. Najafi, K. D. Wise, and T. Mochizuki, “A high-yield IC-compatible multichannel recording array, ” IEEE Trans. Electron Devices, vol. 22, pp. 1206-1211, July 1985. M. Kuperstein and D. A. Whittington, “ A practical 24-channel microelectrode for neural recording in vivo,” IEEE Trans. Biomed. Eng., vol. 28, pp. 288-293, 1981. K. Takahashi and T. Matsuo, “Integration of multimicroelectrode and interface circuits by silicon planar and three-dimensional fabrication technology,” Sensors Actuators, vol. 5 , pp. 89-99, 1984. K. L. Drake, K. D. Wise, J . Hetke, D. J. Anderson, and S . L. BeMent, “Performance of planar multisite microprobes in recording extracellular single-unit intracortical activity, ” IEEE Trans. Biomed. Eng., vol. 35, pp. 719-732, Sept. 1988. K. Najafi and K. D. Wise, “An implantable multielectrode array with on-chip signal processing,” IEEE J . Solid-Stare Circuits, vol. 21, pp. 1035-1044, Dec. 1986. J . F. Hetke, K. Najafi, and K. D. Wise, “Flexible miniature ribbon cables for long-term connection to implantable sensors,” in Dig. 5th Int. Con$ Solid-State Sensors Actuators, Montreux, June 1989, pp. 277-278; also Sensors and Actuators, to be published. I. Ji, K. Najafi, and K. D. Wise, “An electronically-configurable multichannel recording array for neurophysiology,” in Dig. 5th Inr. Con$ Solid-State Sensors Actuators, Montreux, June 1989, pp. 195-196; also Sensors and Actuators, to be published.

Jin Ji (S’87-M’89) received the B.S.E.E. degree from Qinghua University, Beijing, China, in 1982, and the M.S. and Ph.D. degrees in electrical engineering from the University of Michigan, Ann Arbor, in 1984 and 1990, respectively. He is currently working as a Research Fellow in the Department of Electrical Engineering and Computer Science at the University of Michigan. His research activities involve silicon analog” and digital integrated circuit dev sign, process development, and the design and fabrication of silicon multichannel neural signal recording arrays. Dr. Ji is a member of Tau Beta Pi. Y

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Khalil Najafi (S’84-M’86) was born in Iran in 1958. He received the B.S.E.E. degree in 1980 and the M.S.E.E. degree in 1981 both with highest honors from the University of Michigan, Ann Arbor, and the Ph.D. degree in electrical engineering also from the University of Michigan in 1986, working on “multielectrode intracortical recording arrays with on-chip signal processing.” From 1986 to 1988 he was employed as a Research Fellow. from 1988 to 1989 as an Assistant Research Scientist, and since 1989 he has been an Assistant Professor at the Center for Integrated Sensors and Circuits, Department of Electrical Engineering and Computer Science, University of Michigan. His research interests are in the development, design fabrication and testing o f solid-state integrated sensors and actuators; analog and digital integrated circuits; implantable microtelemetry systems and transducers for biomedical applications; technologies and structures for micro electromechanical systems and microstructures; and packaging techniques for implantable transducers. Dr. Najafi was the recipient of the Beatrice Winner Award for Editorial Excellence at the 1986 International Solid-state Circuits Conference. He is a member of Tau Beta Pi, Eta Kappa Nu, and Electrochemical Societies.

Kensall D. Wise (S’61-M’69-SM’83-F’86) received the B.S.E.E. degree with highest distinction from Purdue University, Lafayette, IN, in 1963 and the M . S . and Ph.D. degrees in electrical engineering from Stanford University, Stanford, CA, in 1964 and 1969, respectively. From 1963 to 1965 (on leave 1965- 1969) and from 1972 to 1974, he was a Member of Technical Staff at Bell Telephone Laboratories, where his work was concerned with the exploratory development of integrated electronics for use in telephone communications. From 1965 to 1972 he was a Research Assistant and then a Research Associate and Lecturer in the Department of Electrical Engineering at Stanford, working on the development of integrated circuit technology and its application to solid-state sensors. In 1974 he joined the Department of Electrical Engineering and Computer Science at the University of Michigan, Ann Arbor, where he is now serving as Professor and Director of the Center for Integrated Sensors and Circuits. His present research interests focus on the automated manufacturing of integrated circuits and on the development of solid-state sensors for health care, transportation, and industrial process control. Dr. Wise organized and served as the first chairman of the Technical Subcommittee on Solid-state Sensors of the IEEE Electron Devices Society. He served as General Chairman of the 1984 IEEE Solid-State Sensor Conference, as Technical Program Chairman of the 1985 International Conference on Solid-State Sensors and Actuators, and as IEEE-EDS National Lecturer for 1986. He has served on several program committees for both the International Electron Devices Meeting and the International Solid-state Circuits Conference and received outstanding paper awards from the ISSCC in 1971 and 1979. He is a member of the Electrochemical Society, the AVS, Tau Beta Pi, Eta Kappa Nu, and Sigma Xi.

A low-noise demultiplexing system for active multichannel microelectrode arrays.

This paper reports a low-noise demultiplexing system capable of reconstructing multichannel single-unit neural signals derived from multiplexed microe...
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